Qureos Mentor

Intel Corporation

<div><h1 class="jobSectionHeader">Job Details:
</h1><h2 class="jobSectionHeader">Job Description:
</h2>Do Something Wonderful!
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let&rsquo;s do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
Want to learn more? Visit our YouTube Channel or the links below!
<ul><li>Life at Intel
</li><li>Intel Global Diversity and Inclusion
</li></ul>Responsibilities include, but are not limited to:
<ul><li>Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
</li><li>Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
</li><li>Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
</li><li>Analyzes results and makes recommendations to fix violations for current and future product architecture.
</li><li>Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools.
</li><li>Optimizes design to improve product level parameters such as power, frequency, and area.
</li><li>Participates in the development and improvement of physical design methodologies and flow automation.
</li></ul>This is an entry level position and will be compensated accordingly.
<h2 class="jobSectionHeader">Qualifications:
</h2>You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelor&rsquo;s degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field with 1+ years of relevant experience OR
Master&rsquo;s degree in the same fields
Relevant work experience should be of the following:
<ul><li>Experience with Auto Place Enroute
</li><li>Experience with VLSI Engineering 
</li></ul><h2 class="jobSectionHeader">Job Type:
</h2>College Grad
<h2 class="jobSectionHeader">Shift:
</h2>Shift 1 (United States of America)
<h2 class="jobSectionHeader">Primary Location:
</h2>US, California, Santa Clara
<h2 class="jobSectionHeader">Additional Locations:
</h2><h2 class="jobSectionHeader">Business group:
</h2>At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
<h2 class="jobSectionHeader">Posting Statement:
</h2>All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
<h2 class="jobSectionHeader">Position of Trust
</h2>N/A
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003 
Annual Salary Range for jobs which could be performed in the US: 90,890.00 USD - 170,890.00 USD 
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. 
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.</div>

SoC Design Engineer

<div><h1 class="jobSectionHeader">Job Details:
</h1><h2 class="jobSectionHeader">Job Description:
</h2>Designs, implements, and verifies the layout design of test structures and circuits which enable the development of Intel's leading-edge silicon technologies. The test structures are tailored to model Quality and Reliability (QnR) parameters which are essential to the qualification life cycle for each technology.
You will have the opportunity to work with partners in Technology Development (TD), Design Technology Platform (DTP), and a world class team of QnR engineers to understand, define, and execute the requirements of new trailblazing Test Chips.
Primary responsibilities include but are not limited to:
<ul><li>Develops custom layout design of analog blocks, complex digital, mixed signal blocks, standard cell libraries, or memory compilers (e.g., bitcells, SRAMs, Register Files).
</li><li>Performs detailed physical array planning, area optimization, digital block synthesis, critical wire analysis, custom leaf, cell layout, and compiler assembly coding.
</li><li>Conducts complete layout verification including design rule compliance, SoC integration specs, electron migration, voltage drop (IR), selfheat, ESD, and other reliability checks. Uses custom auto-routers and custom placers to efficiently construct layout.
</li><li>Provides feedback to circuit design engineers for new feature feasibility studies and implements circuit enhancement requests.
</li><li>Develops and drives new and innovative layout methods to improve productivity and quality.
</li><li>Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology issues used for layout design.
</li></ul>Additional responsibilities:
<ul><li>Designs, implements, verifies, and supports the enablement and adoption of hardware design tools, flows, and methodologies.
</li><li>Defines methodologies for hardware development related to technology node and EDA tool enabling.
</li><li>Creates and verifies unique hardware designs, assembles design platforms, and integrates components into hierarchical systems to provide deployment coverage for end-to-end EDA tool testing on new technology nodes.
</li><li>Develops, tests, and analyzes engineering design automation tools, flow, and methodologies to improve efficiency and optimize power and performance.
</li><li>Supports development and enhancement of platforms, databases, scripts, and tools flows for design automation.
</li><li>Builds deep understanding of digital design, verification, structural and physical layout, full-chip integration, power, and performance clocking, and/or timing to enhance future TFM development.
</li><li>Collaborates with EDA vendors on defining and early testing of next-generation design tools.
</li></ul><h2 class="jobSectionHeader">Qualifications:
</h2>You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Knowledge and/or experience listed below would be obtained through a combination of your school, work and/or classes and/or research and/or relevant previous job and/or internship experiences.
Minimum Qualifications:
<ul><li>Bachelor's degree in Electrical/Computer Engineering or related field and 6+ years of experience OR a Master's degree in Electrical/Computer Engineering or related field and 4+ years of experience OR a PhD in Electrical/Computer Engineering or related field and 2+ years of experience in:
<ul><li>Layout design &amp; Cadence Virtuoso
</li></ul></li></ul>Preferred qualifications:
<ul><li>6+ years of experience in:
<ul><li>CMOS VLSI design concepts, flows, and EDA tools
</li><li>Programming/scripting in C/C++, Python.
</li><li>UNIX/Linux operating systems.
</li></ul></li><li>8+ years of experience in layout design, Cadence Virtuoso Layout Suite, layout debug (DRC, LVS).
</li><li>4+ years of experience in EDA Tools, Flows, and Methodology (TFM) development
</li><li>1+ year of experience with Cadence SKILL programming languages.
</li><li>Experience leading and coordinating small/medium size group of layout designers.
</li>Strong initiative, analytical/problem solving skills, communication skills, team working skills, ability to multitask and be able to work with a diverse team located in different geos. 
<li>
</li></ul><h2 class="jobSectionHeader">Job Type:
</h2>Experienced Hire
<h2 class="jobSectionHeader">Shift:
</h2>Shift 1 (United States of America)
<h2 class="jobSectionHeader">Primary Location:
</h2>US, Oregon, Hillsboro
<h2 class="jobSectionHeader">Additional Locations:
</h2>US, Arizona, Phoenix
<h2 class="jobSectionHeader">Business group:
</h2>Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers - from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
<h2 class="jobSectionHeader">Posting Statement:
</h2>All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
<h2 class="jobSectionHeader">Position of Trust
</h2>N/A
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003 
Annual Salary Range for jobs which could be performed in the US: 121,050.00 USD - 227,620.00 USD 
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. 
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.</div>

Senior Layout Designer

<div>
 
 Job Details
 
 
 
 Job Description:
 
 
 We're looking to hire a highly motivated mechanical engineer to join Advanced Packaging Mechanical Analysis team located in Chandler AZ. This role is focused on developing Multiphysics thermo-mechanical simulations to support design, definition, development and qualifications of advanced semiconductor packaging led by Intel Foundry. This position offers the opportunity to work at the forefront of semiconductor packaging innovation, collaborating with engineers and researchers across multiple business groups such as design, technology integration, reliability, yield and manufacturing.
 
 
 
 Job Description
 
 
 
 <ul>
 <li>
 Develop and validate finite element analysis (FEA) models to simulate thermal and mechanical behavior of advanced semiconductor packages. Perform simulations to evaluate stress, strain, warpage, delamination, thermal cycling, and reliability risks across a wide range of package architectures.
 </li>
 <li>
 Collaborate with cross-functional teams to define simulation requirements, interpret results, and provide actionable design and process recommendations. Design and coordinate lab tests and research on basic materials and properties to understand material behavior and reliability failure mechanisms.
 </li>
 <li>
 The ideal candidate will have to drive strategic development activities and work closely with internal and external customer organizations to plan, execute and communicate development activities and programs.
 </li>
 <li>
 The team leverages both experimental and numerical methods across a broad range of areas, including thermal, mechanical, and fluids.
 </li>
 <li>
 The team typically uses a combination of simulations and experiments, as needed, to help solve practical engineering problems.
 </li>
 <li>
 The team frequently leverages advanced analysis methods (statistical, AI/ML) to supplement modeling and experimental approaches.
 
 
 </li>
 </ul>
 
 Note:
 
 This role requires regular onsite presence to fulfill essential job responsibilities. Provides tactical and strategic operational support to ensure the successful development and ramp of a high volume or technology development fabrication facility.
 
 
 The ideal candidate should exhibit the following skills or behavioral traits:
 
 
 <ul>
 <li>
 Demonstrated ability to work seamlessly between experiments and simulations.
 
 
 </li>
 </ul>
 
 Qualifications
 
 
 
 You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
 
 
 
 Minimum Qualifications
 
 
 
 <ul>
 <li>
 Master's Degree in Mechanical Engineering, Chemical Engineering or Material Sciences or a related field with emphasis in solid mechanics and 3+ years of relevant experience
 </li>
 <li>
 -OR- PhD Degree in Mechanical Engineering, Chemical Engineering or Material Sciences or a related field with emphasis in solid mechanics
 
 
 </li>
 </ul>
 
 Preferred Qualifications
 
 
 
 <ul>
 <li>
 Experience with multi-physics simulations, including coupled electro-thermal-mechanical analysis, free surface two phase flows, electroplating and plasma.
 </li>
 <li>
 Experience with designing, planning and executing experiments, along with interpretation of results.
 </li>
 <li>
 Experience with scripting and automation (e.g., Python, TCL, MATLAB) to streamline simulation workflows.
 </li>
 <li>
 Strong understanding of advanced packaging technologies, familiarity with semiconductor packaging processes, including die attach, underfill, molding, bumping, surface mount and reflow.
 </li>
 <li>
 Programming/script development with artificial intelligence and machine learning concepts.
 </li>
 <li>
 Previous related work experience in a semiconductor foundry preferred
 
 
 </li>
 </ul>
 
 Job Type
 
 
 
 Experienced Hire
 
 
 
 Shift
 
 
 
 Shift 1 (United States of America)
 
 
 Primary Location:
 
 
 US, Arizona, Phoenix
 
 
 Additional Locations:
 
 
 US, Oregon, Hillsboro
 
 
 
 Business Group
 
 
 
 Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
 
 
 
 Posting Statement
 
 
 
 All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
 
 
 Position of Trust
 
 
 N/A
 
 
 
 Benefits
 
 
 
 We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
 
 
 https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003
 
 
 Annual Salary Range for jobs which could be performed in the US: 100,160.00 USD - 193,390.00 USD
 
 
 The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
 
 
 
 Work Model for this Role
 
 
 
 This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
</div>

Mechanical Analysis Packaging Engineer

<div><h1 class="jobSectionHeader">Job Details:
</h1><h2 class="jobSectionHeader">Job Description:
</h2>Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision.
Join us and build on our legacy of innovation and collaboration as we deliver world-changing technology that improves the life of every person on the planet.
As a Lithography Supply Chain Engineer , you will:
<ul><li>Supports management/senior leadership to incorporate process and quality improvements in Intel&rsquo;s supply chain and logistics strategy.
</li><li>Defines material inspection methodology, conducts studies related to cost control, process control, and production yield, and implements plans and programs to optimize supply chain.
</li><li>Supports product long range plan development by defining next generation methodology capabilities to support Intel&rsquo;s supply chain roadmap.
</li><li>Explores and benchmarks emerging technology in the industry.
</li><li>Contributes to Intel&rsquo;s future technology definition and requirements.
</li><li>Highlights gaps between roadmap strategy, manufacturing capability, and market demands and recommends solutions to addresses those gaps.
</li><li>Tracks supply demand trends, conducts root cause analysis to find opportunities for process and quality improvements, and collaborates with supply chain leads to implement solutions.
</li><li>Leads supplier selections for new business in partnership with commodity managers and technical/quality partners and drives product and purchase specification content to ensure commodity performance compliance.
</li><li>Performs alternate sourcing risk mitigation for single sourced commodities.
</li><li>Establishes control standards, determines KPIs, monitors performance against targets, and drives root cause analysis for supply chain issues to arrive at solutions.
</li><li>Drives supplier process window validation activities on critical process modules through all stages of development.
</li><li>Drives supplier improvements on quality, reliability, yield, and cost.
</li><li>Maintains quality standards and systems, creating relevant specifications to minimize variability and subjectivity to align with operational capability requirements.
</li><li>Leads quality excursion management and drives failure mode analysis with suppliers.
</li></ul><h2 class="jobSectionHeader">Qualifications:
</h2>You must possess the below minimum qualifications to be initially considered for this position. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience.
T his position is not eligible for Intel immigration sponsorship.
Minimum Qualifications:
Education : Bachelor's or Master's degree in Chemistry, Chemical Engineering, Physics, or Materials Science or related fields.
6+ years of relevant experience in:
<ul><li>Factory Operations or Support Group Work
</li><li>Lithography Processes
</li><li>FMEA, SPC, PCSA, and 8D
</li></ul>Preferred Qualifications:
<ul><li>PhD in relevant technical field
</li><li>Prior experience working with and/or managing suppliers
</li><li>Strong analytical skills and the ability to work effectively in ambiguous situations.
</li><li>Experience in supply chain or supplier management, particularly with suppliers based in Asia.
</li></ul>Interview Tips here.
By applying to this posting your resume and profile will become visible to Intel Recruiters and will allow them to consider you for current and future job openings aligned with the skills and positions mentioned above.
Intel Benefits: https://www.intel.com/content/www/us/en/jobs/benefits.html
Life Inside Intel: https://www.intel.com/content/www/us/en/jobs/life-at-intel.html
Interviewing Tips: https://www.intel.com/content/www/us/en/jobs/hiring.html
Intel&rsquo;s core values: https://www.intel.com/content/www/us/en/corporate-responsibility/our-values.html?wapkw=our%20company 
<h2 class="jobSectionHeader">Job Type:
</h2>Experienced Hire
<h2 class="jobSectionHeader">Shift:
</h2>Shift 1 (United States of America)
<h2 class="jobSectionHeader">Primary Location:
</h2>US, Oregon, Hillsboro
<h2 class="jobSectionHeader">Additional Locations:
</h2>US, Arizona, Phoenix
<h2 class="jobSectionHeader">Business group:
</h2>Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers - from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
<h2 class="jobSectionHeader">Posting Statement:
</h2>All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
<h2 class="jobSectionHeader">Position of Trust
</h2>N/A
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003 
Annual Salary Range for jobs which could be performed in the US: 136,990.00 USD - 193,390.00 USD 
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. 
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.</div>

Lithography Supply Chain Engineer

<div><h1 class="jobSectionHeader">Job Details:
</h1><h2 class="jobSectionHeader">Job Description:
</h2>Do Something Wonderful!
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let&rsquo;s do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
Want to learn more? Visit our YouTube Channel or the links below!
<ul><li>Life at Intel
</li><li>Intel Global Diversity and Inclusion
</li></ul>Responsibilities include, but are not limited to:
<ul><li>Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well as test content generation and delivery to manufacturing for various DFx content (including SCAN, MBIST, and BSCAN).
</li><li>Participates and collaborates in the definition of architecture and microarchitecture features of the block, subsystem, and SoC under DFT being designed (including TAP, SCAN, MBIST, BSCAN, proc monitors, in system test/BIST).
</li><li>Develops HVM content for rapid bring up and ramp to production on the automatic test equipment (ATE).
</li><li>Applies various strategies, tools, and methods to write and generate RTL and structural code to integrate DFT.
</li><li>Optimizes logic to qualify the design to meet power, performance, area, timing, test coverage, DPM, and test time/vector memory reduction goals as well as design integrity for physical implementation.
</li><li>Reviews the verification plan and drives verification of the DFT design to achieve desired architecture and microarchitecture specifications.
</li><li>Ensures design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
</li><li>Integrates DFT blocks into functional IP and SoC and supports SoC customers to ensure high-quality integration of the IP block.
</li><li>Collaborates with post silicon and manufacturing team to verify the feature on silicon, support debug requirements, and document all learnings and improvements requirement in design and validation.
</li><li>Drives high test coverage through structural and specific IP tests to achieve the quality and DPM objectives of the product and develops HVM content for rapid bring up and production on the ATE.
</li></ul><h2 class="jobSectionHeader">Qualifications:
</h2>You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelor&rsquo;s degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field with 4+ years of relevant experience
&mdash; or &mdash;
Master&rsquo;s degree in the same fields with 3+ years of relevant experience
&mdash; or &mdash;
PhD in the same fields with 6+ months of relevant experience
Relevant work experience should be of the following:
<ul><li>Experience with DFT Array Test including MBIST or Scan/ATPG or DFT Verification
</li></ul>Preferred Qualifications:
<ul><li>Expertise in Tessent DFT tool
</li><li>Expertise in Primetime especially in DFT constraints
</li><li>Expertise in Quality checks such as Lint, VCLP, CDC/RDC, LEC, Spyglass DFT 
</li></ul><h2 class="jobSectionHeader">Job Type:
</h2>Experienced Hire
<h2 class="jobSectionHeader">Shift:
</h2>Shift 1 (United States of America)
<h2 class="jobSectionHeader">Primary Location:
</h2>US, California, Santa Clara
<h2 class="jobSectionHeader">Additional Locations:
</h2>US, Oregon, Hillsboro, US, Texas, Austin
<h2 class="jobSectionHeader">Business group:
</h2>At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
<h2 class="jobSectionHeader">Posting Statement:
</h2>All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
<h2 class="jobSectionHeader">Position of Trust
</h2>N/A
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003 
Annual Salary Range for jobs which could be performed in the US: 139,710.00 USD - 262,680.00 USD 
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. 
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.</div>

DFT Design Engineer

<div><h1 class="jobSectionHeader">Job Details:
</h1><h2 class="jobSectionHeader">Job Description:
</h2>Intel is seeking an exceptional, business-minded attorney to join our Commercial Legal team, which supports Intel's business units that design and deliver cutting-edge semiconductor products, software, and technology solutions for the PC, data center, networking, edge and AI market segments. As a key member of our Legal team, you will partner directly with senior executives, engineering leads, product managers, and commercial stakeholders to provide legal advice and structure, draft, and negotiate high-impact agreements that enable our innovation and go-to-market strategies.
We are looking for a lawyer who thrives on complexity, can lead sophisticated transactions, and enjoys working collaboratively in a fast-paced environment. This position offers the opportunity to influence Intel's most strategic initiatives and shape the future of technology.
Key responsibilities include but are not limited to:
<ul><li>Lead drafting, structuring, and negotiation of a wide range of agreements, including: technology collaboration agreements, inbound and outbound technology and IP licenses, optimization and ecosystem enablement agreements, and software license and SaaS agreements.
</li><li>Advise cross-functional teams on product strategy, development cycles, commercialization, and risk management.
</li><li>Provide strategic counsel on a broad range of legal issues, including IP ownership, licensing frameworks, confidentiality, antitrust, privacy, export controls, and pre-litigation matters.
</li><li>Serve as a trusted advisor to senior business leaders, delivering clear, practical, and business-oriented legal guidance.
</li><li>Collaborate across Intel's legal and business teams to drive solutions that enable growth and manage risk.
</li></ul><h2 class="jobSectionHeader">Qualifications:
</h2>You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This position is not eligible for Intel's immigration sponsorship.
Minimum Qualifications
<ul><li>J.D. from an accredited law school and membership in good standing with a state bar
</li><li>5+ years of experience in commercial, technology, and product-related transactions
</li></ul>Preferred Qualifications:
<ul><li>Significant in-house experience at a leading technology company.
</li><li>Proven ability to lead and execute sophisticated technology transactions, including technology/IP licensing, custom silicon/ASIC deals.
</li><li>Exceptional negotiation, drafting, communication and stakeholder-management skills.
</li><li>Strong business acumen and judgment, with the ability to influence senior stakeholders.
</li><li>Expertise in technology transactions and familiarity with semiconductor industry dynamics.
</li><li>Demonstrated ability to balance legal risk with business objectives and communicate clearly with both legal and non-legal audiences
</li><li>Highly collaborative team player with a positive, solutions-oriented approach.
</li>Ability to work independently in a fast-paced environment while maintaining high-quality results 
<li>
</li></ul><h2 class="jobSectionHeader">Job Type:
</h2>Experienced Hire
<h2 class="jobSectionHeader">Shift:
</h2>Shift 1 (United States of America)
<h2 class="jobSectionHeader">Primary Location:
</h2>US, California, Santa Clara
<h2 class="jobSectionHeader">Additional Locations:
</h2>US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro
<h2 class="jobSectionHeader">Business group:
</h2>Intel&rsquo;s Corporate Affairs, Policy, Integrity, Trade, and Legal (CAPITL) group offers unique opportunities to work in a variety of areas, including counsel to Intel businesses; technology and intellectual property licensing; patent prosecution; trademarks and brands; litigation, mergers, acquisitions and investing; public policy, legislative and regulatory lobbying; global trade, export, import, and customs; and corporate compliance.
<h2 class="jobSectionHeader">Posting Statement:
</h2>All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
<h2 class="jobSectionHeader">Position of Trust
</h2>N/A
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003 
Annual Salary Range for jobs which could be performed in the US: 144,010.00 USD - 301,610.00 USD 
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. 
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.</div>

Business Attorney

<div><h1 class="jobSectionHeader">Job Details:
</h1><h2 class="jobSectionHeader">Job Description:
</h2>Intel's Foundry Automation group is seeking an experienced Software Automated Pipeline Tester. 
 
 
 
Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. 
 
Responsibilities include but not limited to:
<ul><li>Execute test cases, validate results, debug software across multiple layers of the software stack, develop code, automate.
</li><li>Work with other teams on identifying root causes and understanding application logic.
</li><li>Design automated solutions, analyze data, identify patterns and document.
</li><li>Must be able to work independently, be inquisitive, detail oriented, have the drive to learn new things and to investigate anomalies.
</li><li>Must have good or excellent communication skills and be able to work with different domains/geos.
</li></ul><h2 class="jobSectionHeader">Qualifications:
</h2><div></div><div><div><div><div><div><div><div><div><div>You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.
 
 
Minimum Qualifications:
<ul><li>Bachelor's degree in Computer Science, Engineering or related STEM field and 1+ years of industry experience working in software development teams or master's degree in Computer Science or related STEM field.
</li><li>1+ years of experience xml, PLSQL Developer or equivalent.
</li><li>1+ years' experience with scripting language (preferably Python).
</li><li>1+ years of experience GitHub, Jira or similar applications (user stories, features, test case management, bug tracking, structures). 
</li></ul> 
Preferred Qualifications:
<ul><li>Experience working in a manufacturing environment, specifically the semiconductor industry will be an asset.
</li><li>Working knowledge of automated testing methodology. 
</li></ul> 
 
Benefits at Intel
 
 
Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion. 
</div></div></div></div></div></div></div></div></div><h2 class="jobSectionHeader">Job Type:
</h2>Experienced Hire
<h2 class="jobSectionHeader">Shift:
</h2>Shift 1 (United States of America)
<h2 class="jobSectionHeader">Primary Location:
</h2>US, Arizona, Phoenix
<h2 class="jobSectionHeader">Additional Locations:
</h2><h2 class="jobSectionHeader">Business group:
</h2>Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers - from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
<h2 class="jobSectionHeader">Posting Statement:
</h2>All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
<h2 class="jobSectionHeader">Position of Trust
</h2>N/A
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003 
Annual Salary Range for jobs which could be performed in the US: 109,070.00 USD - 206,860.00 USD 
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. 
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.</div>

Software Test Engineer

Join Intel Corporation and explore 9   exciting career opportunities. They're hiring for various roles with options for remote or on-site work. Apply today and become part of their innovative team.