Qureos Mentor

Broadcom

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Job Description:</div><div></div><div>
Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group at our site in Colorado Springs, Colorado. This position involves working with the latest technology to continue driving next generation Artificial Intelligence and Machine Learning ecosystems through our PCIe Switch Products &ndash; and managing mega datacenters, while leading world class performance, through our Enterprise Storage Products. More specifically, this position will require in-depth knowledge and expertise in all Physical Design aspects of taking RTL to silicon tape-out.</div><div></div><div>
Responsibilities include, but are not limited to the following:</div><ul><li><div>
Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure</div></li><li><div>
Setup and Synthesizing RTL</div></li><li><div>
Timing closure through various methods and strategies</div></li><li><div>
EM/IR Analysis</div></li><li><div>
Place and Route</div></li><li><div>
Clock Tree Synthesis</div></li><li><div>
Floor-planning and Layout</div></li><li><div>
Flow and Methodology Development</div></li><li><div>
Collaborating with IC Design RTL Engineers</div></li><li><div>
Must work in person at our Colorado Springs site: no remote work allowed.</div></li></ul><div></div><div>
Required attributes:</div><ul><li><div>
TCL/PERL Scripting</div></li><li><div>
Proficiency in related EDA Tools</div></li><li><div>
Full physical design cycle experience: RTL to Tape-out</div></li><li><div>
Excellent verbal and written communication skills</div></li></ul><div></div><div>
Education and Experience Requirements:</div><ul><li><div>
Minimum: Bachelor&rsquo;s degree required in Electrical Engineering or Electronics Engineering</div></li><li><div>
8+ years of relevant experience</div></li></ul><div></div><div>
Additional Job Description:</div><div>
Compensation and Benefits</div><div></div><div>
The annual base salary range for this position is $108,000 - $172,800</div><div></div><div>
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.</div><div></div><div>
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.</div><div></div><div>
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.</div><div></div><div>
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.</div></div>

Physical IC Design Engineer

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1. If you are a first time user, please create your candidate login account before you apply for a job.</div><div>
2. If you already have a Candidate Account, please Sign-In before you apply.</div><div></div><div>
Job Description:</div><div></div><div>
Principal DFT Engineer</div><div></div><div>
Broadcom's ASIC Product Division is seeking candidates for a DFT position at our San Jose, California Development Center. The successful candidate will be responsible for leading DFT programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully releasing products to production.</div><div></div><div>
The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Products Division)&rsquo;s designs &ndash; DFT Architecture, Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement to meet the product test metrics. It involves working with the Physical Design &amp; STA team for DFT mode timing closure. The role could also involve direct interaction with external customers.</div><div></div><div>
It is expected that you can code using TCL, PERL, RUBY, PYTHON, C++ or similar.</div><div></div><div>
Responsibilities:</div><ul><li><div>
Understanding Broadcom &amp; customer DFT feature requirements &amp; DPPM goals &amp; defining appropriate DFT specifications for the ASIC</div></li><li><div>
Implementing DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration</div></li><li><div>
Working closely with STA and DI Engineers design closure for test</div></li><li><div>
Generating, Verifying &amp; Debugging Test vectors before tape release.</div></li><li><div>
Validating &amp; Debugging Test vectors on ATE during the silicon bring up phase</div></li><li><div>
Assisting with silicon failure analysis, diagnostics &amp; yield improvement efforts</div></li><li><div>
Interfacing with the customer, physical design and test engineering/manufacturing teams located globally</div></li><li><div>
Working closely with I/P DFT engineers &amp; other stakeholders</div></li><li><div>
Debugging customer returned parts on the ATE</div></li><li><div>
Innovating newer DFT solutions to solve testability problems in 7nm &amp; beyond</div></li><li><div>
Automating DFT &amp; Test Vector Generation flows</div></li></ul><div></div><div>
 Skills/Experience:</div><ul><li><div>
Strong DFT background (such as IO and Analog DFT, ATPG and/or Scan, BIST, and others)</div></li><li><div>
Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, etc.)</div></li><li><div>
Well-versed in ATPG vector generation, simulation, and debugging. (TetraMax, Fastscan)</div></li><li><div>
Experience in Verilog coding, testbench generation &amp; simulation</div></li><li><div>
Memory BIST insertion and verification experience on embedded (SRAM, CAM, eDRAM, ROM)</div></li><li><div>
Boundary scan Verification and test vector generation. Should have good knowledge in IEEE1149.1 and IEEE1149.6</div></li><li><div>
Basic knowledge Test-STA and constraints</div></li><li><div>
Strong background on IEE1687, IJTAG, ICL and PDL</div></li><li><div>
The ability to work in a multi-disciplined, cross-department environment<br>
Solid knowledge in analog and digital circuit design, and device physics fundamentals<br>
Good understanding of Si processing, logical and physical synthesis, and transistor reliability principles</div></li><li><div>
Excellent problem solving, debug , root cause analysis and communication skills</div></li><li><div>
Experience working on the ATE is a plus</div></li><li><div>
Experience with Serdes, DDR, PCIE, ENET, CXL IOBIST verification and silicon debug is a plus</div></li><li><div>
Experience working on Tessent SSN is a plus</div></li></ul><div><br>
Education &amp; Experience:</div><ul><li><div>
Bachelors in Electrical/Electronic/Computer Engineering and 12+ years of relevant industry experience or Masters Degree in Electrical/Electronic/Computer Engineering and 10+ years of relevant industry experience</div></li></ul><div></div><div>
Additional Job Description:</div><div>
Compensation and Benefits</div><div></div><div>
The annual base salary range for this position is $141,300 - $226,000</div><div></div><div>
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.</div><div></div><div>
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.</div><div></div><div>
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.</div><div></div><div>
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.</div></div>

DFT Engineer

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1. If you are a first time user, please create your candidate login account before you apply for a job.</div><div>
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Job Description:</div><div></div><div>
Seeking a highly focused and motivated engineer in a software team responsible for testing AI/ML Interconnect Solutions. The candidate should have a strong understanding of Ethernet functionality, TCP/IP networking, virtualization technologies, RDMA, PCIe protocol - Gen3 &amp; above. Good understanding of AI/ML clusters, Deep learning models, and GPU Micro benchmarks.</div><div></div><div>
Primary Responsibilities</div><ul><li><div>
Creation and review of Test scenarios, Test cases, and Test Automation</div></li><li><div>
Reviews of design and functional specifications created by the development team to understand product functionality.</div></li><li><div>
Execute test activities and work closely with multi-site team of developers and testers</div></li><li><div>
Review User Documentation to ensure it clearly documents product functionality</div></li><li><div>
Prioritize and manage multiple, parallel tasks, projects &amp; releases</div></li></ul><div></div><div>
Qualifications:</div><ul><li><div>
Bachelor's degree in Engineering with a minimum of two (2) years of hands-on test experience, or a Master's degree in Engineering</div></li><li><div>
Requirements:</div></li><li><div>
Strong analytical, problem-solving skills &amp; debugging skills.</div></li><li><div>
Possess excellent communication skills and need to be a critical thinker and a self-starter.</div></li><li><div>
Possess a strong &ldquo;break feature mentality&rdquo;</div></li><li><div>
Possess a strong engineering mindset to develop thorough test cases</div></li><li><div>
Strong networking experience with protocol testing &amp; validations. Experience with L2/L3 protocols especially RoCE( RDMA over Converged Ethernet ) protocol &amp; use cases in AI/ML, HPC clusters.</div></li><li><div>
Experience on AMD/NVIDIA GPUs, Communication Collectives - RCCL/NCCL &amp; libraries - RoCM/CUDA.</div></li><li><div>
Experience in utilizing automation scripts in Python &ndash; primarily network and system-level programming using Python.</div></li><li><div>
Having experience with network test equipment &ndash; Protocol/PCIe Analyzers, Protocol Jammers, Load Generators (Ixia, Ixchariot, Medusa tools, etc) is a plus</div></li><li><div>
Having experience testing PCIe switch, good knowledge of PCI-E is a plus</div></li><li><div>
Having knowledge of deep learning models - NLP, LLMs, Recommendations, Image Classification is a plus</div></li><li><div>
Having experience with deploying BERT/LlamaV2 or relevant models and Micro benchmarking - MLPerf is a plus</div></li><li><div>
Having experience with Docker Containers &amp; deployment using Kubernetes/ Ansible is a plus</div></li></ul><div></div><div>
Additional Job Description:</div><div>
Compensation and Benefits</div><div></div><div>
The annual base salary range for this position is $81,000 - $130,000</div><div></div><div>
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.</div><div></div><div>
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.</div><div></div><div>
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.</div><div></div><div>
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.</div></div>

AI/ML QA Engineer

Join Broadcom and explore 3   exciting career opportunities. They're hiring for various roles with options for remote or on-site work. Apply today and become part of their innovative team.

Broadcom

ABOUT_COMPANY

Physical IC Design Engineer

DFT Engineer

AI/ML QA Engineer