Qureos Mentor

Broadcom

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Job Description:</div><div></div><div>
System Signal/Power Integrity Engineer</div><div><i>
Responsibilities</i></div><ul><li><div>
Support high data rate SerDes applications - up to 112Gbps NRZ and 224G PAM4 systems</div></li><li><div>
System level Signal and Power Integrity design trade-offs and debug.</div></li><li><div>
Collaborate with package, PCB, and silicon designers to complete measurement-simulation correlation projects.</div></li><li><div>
Develop models with electromagnetic field solvers: primarily with Ansys HFSS and electronic suite.</div></li><li><div>
Ability to understand laminate design and fabrication techniques and limitations for both package and PCB designs.</div></li><li><div>
Evaluate system, PCB and package material and connector solutions for future designs.</div></li><li><div>
Simulate schematic models and environments within Keysight ADS.</div></li><li><div>
Ensure and know trade-offs for the accuracy of models (3D/2.5D/2D) used for design simulations.</div></li><li><div>
Perform and develop VNA/TDR (50GHz+) measurement techniques and correlate with models and simulations.</div></li><li><div>
Provide feedback and learnings from measurement-simulation correlation investigations to improve best practices for modeling and simulations.</div></li><li><div>
Capture high fidelity lab measurements to be used for correlation and debug purposes</div></li><li><div>
Experience with sampling and real-time oscilloscopes, spectrum analyzers, and optical oscilloscopes.</div></li><li><div>
Understand and apply:</div><ul><li><div>
High speed data communications</div></li><li><div>
Transmission-line and electromagnetic-field theory</div></li><li><div>
Numerical analysis</div></li><li><div>
VNA/TDR measurements</div></li><li><div>
Bit-by-bit and Statistical simulators for serial data (SerDes) links</div></li><li><div>
Insertion loss, return loss, crosstalk, BER, jitter, and statistical eye diagrams</div></li><li><div>
Work in either time domain or frequency domain</div></li><li><div>
Phase noise analysis as it applies to PLL&rsquo;s, reference clocks, SerDes TX-RX links</div></li><li><div>
Jitter sensitivity measurement and analysis for SerDes IP</div></li></ul></li><li><div>
Organize and manage multiple projects</div></li><li><div>
Develop, clearly and effectively document, and track project plans</div></li><li><div>
Effectively communicate complex concepts in conversation, presentations and written documents</div></li><li><div>
Determine and document applicable requirements for ASIC package and PCB designs, drawing from industry standards, customer requirements, and/or APD Broadcom&rsquo;s internal performance goals</div></li><li><div>
Collaborate with Package and PCB Engineers to fulfill System SI requirements, while balancing objectives (reliability, cost, complexity, etc.)</div></li><li><div>
Pre-layout and post-layout modeling and simulation to support package and PCB engineering for signal integrity</div></li><li><div>
Document and deliver SI models with supporting documentation to customer and internal engineers</div></li><li><div>
Support customer analysis and debug efforts related to our deliverables</div></li><li><div>
Understanding of optical/electrical engine concepts and theory of operation, CWDM, OMA, etc..</div></li><li><div>
Familiarity with optical channel impairments such as chromatic dispersion (CD) and four-wave mixing (FWM).</div></li><li><div>
Power Integrity Concepts: PDN impedance analysis and design, ultra-low impedance measurements, understanding of SMT capacitor performance metrics, use of CPA and/or SI-Wave for PDN simulations.</div></li></ul><div></div><div><i><br>
Qualifications</i></div><ul><li><div>
BS +8yrs, MS +6 yrs or PhD +3yrs Electrical Engineering or Physics and years experience in one or more of:</div><ul><li><div>
Signal/Power integrity for high-speed digital applications</div></li><li><div>
Electromagnetic transmission line theory</div></li><li><div>
Microwave theory</div></li><li><div>
Numerical Field solver theory</div></li><li><div>
Power integrity</div></li><li><div>
IC package design</div></li><li><div>
Photonics</div></li></ul></li></ul><div></div><div><i>
Tools</i></div><ul><li><div>
EM modeling (Ansys HFSS/SIWave/Q3D and Polar)</div></li><li><div>
Circuit simulation tools (Keysight ADS)</div></li><li><div>
Matlab (desired)</div></li><li><div>
Cadence APD/Allegro (desired)</div></li><li><div>
Other layout tools (desired)</div></li><li><div>
Linux (desired)</div></li><li><div>
Keysight AEL (desired)</div></li><li><div>
Perl (desired)</div></li></ul><div></div><div>
Additional Job Description:</div><div>
Compensation and Benefits</div><div></div><div>
The annual base salary range for this position is $108,000 - $172,800.</div><div></div><div><br>
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.</div><div></div><div>
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.</div><div></div><div>
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.</div><div></div><div>
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.</div></div>

System Signal Integrity Engineer

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Job Description:</div><div></div><div>
Job Description:</div><div>
Software Engineer responsible for designing and development of the network drivers for the High Performance Ethernet NIC.</div><div></div><div>
Responsibilities:</div><ul><li>
As a Software Engineer, you will be responsible for the design and development of the network driver for the High Performance Ethernet NIC.</li><li>
Work closely with the Architecture teams, Silicon Design teams and other Software / Firmware teams to architect, design and implement scalable and high performance applications</li><li>
Author and contribute in software design, development, validation, and documentation to deliver high quality, high performance and functionally excellent products.</li><li>
Work with the QA team to define high quality test cases, review the tests and support through the release development cycle.</li><li>
Work closely with the Customer Support Engineers on any customer field issues and provide timely resolutions</li></ul><div></div><div>
Requirements:</div><ul><li>
Minimum Bachelor's Degree in Computer Science/ Electronics / Electrical Engineering.</li><li>
Overall 12+ years of experience in Linux Systems programming, Linux kernel, Linux Network Drivers, Linux Kernel Networking, Virtual Switching and Data center Networking.</li><li>
Experience delivering high-performance NIC drivers in Linux and firmware implementation to support multi-ring architecture.</li><li>
Strong PCIe NIC background to design optimal Rx/Tx data transfer over PCIe, Control and Data Path implementation of Firewall using iptables including offload of Firewall functionality.</li><li>
Experience with SR-IOV / virtio based Virtualization Implementation is desired.</li><li>
Good experience with one or more of fast path implementations - DPDK, eBPF, XDP</li><li>
Hands-on experience with KTLS / DTLS Design and Implementation including HW offload of TLS, IPSec HW Offload using Linux XFRM framework are desirable.</li><li>
Good understanding of Network security threats (DoS / DDoS, MIM attacks), TPM</li><li>
Excellent programming skills in C, C++ and Python. Proficiency in developing optimized code in both x86 and ARM64 compiler toolchains.</li><li>
Strong analytical, problem solving and debugging skills in a combined Software and Hardware environments.</li><li>
Excellent written and verbal communication skills, Ability to efficiently collaborate with multiple teams across geographically diverse areas.</li><li>
Good understanding of RDMA &amp; RoCE protocol areas including the user space Verbs API, Linux RDMA core drivers, RoCE drivers, and the RoCE firmware development is desired.</li><li>
Good understanding of HW and OS interactions on Multi-host, Multi-Root and Network Partitioning (NPAR) deployments is highly desired. Exposure to virtualization technologies like Hypervisors, VirtIO, SRIOV, Virtual IOMMU, Memory Management is desired.</li><li>
CI/CD experience using Jenkins, Git is preferred</li><li>
Enthusiastic, Quick Learner and passionate about programming</li><li>
A team player with good Social Skills</li></ul><div></div><div>
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.</div><div></div><div>
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.</div></div>

Software Engineer, Network Drivers for High Speed Ethernet NIC

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Job Description:</div><div></div><div>
Design analog blocks, systems or sub-systems using a combination of behavioral modeling tools and transistor level circuit design tools. Previous work in envelope tracking systems or equivalent techniques is highly desirable. Proficiency in analog design including high speed amplifiers (up to hundreds of MHz). Proficiency in high speed comparator design. In-depth knowledge of CMOS devices. RF design knowledge is highly desirable. Proficiency in simulation techniques and tools including RF. Proficiency in system analysis of noise, linearity, power optimization. In depth knowledge of analog and RF layout techniques. Knowledge of analog and mixed signal IP design including ADCs, DACs, references, oscillators, LDOs is highly desirable. Knowledge of switched power supplies is highly desirable. Must be capable of implementing and optimizing circuit architectures and transistor-level circuit solutions to achieve a variety of challenging noise, distortion, power consumption and cost requirements. Help take responsibility for projects with teams of analog engineers. Draw or oversee the drawing of the custom physical layout of these circuits. Work with others to define circuit board components to be used with these circuits. Define requirements for internal chip interfaces between the analog and digital circuits. Review the chip package pinout / ballout and review and revise the chip package route with package layout engineers. Design and/or review the PC test board schematics used for testing the IC performance. Characterize the performance of these ICs using lab equipment. Debug performance problems found during characterization of these analog circuits. Work with automatic test engineers (ATE) to develop production tests for these circuits. Document the operation and performance of these analog circuits.</div><div></div><div>
Job Requirements</div><div></div><div>
MS/Ph.D in Electrical Engineering or equivalent education. Typically an MS with 10+ years of experience or a PhD with 7+ years of experience. Previous work in envelope tracking systems or equivalent techniques is highly desirable. Proficiency in analog design including high speed amplifiers (up to hundreds of MHz). Proficiency in high speed comparator design. In-depth knowledge of CMOS devices. RF design knowledge is highly desirable. Proficiency in simulation techniques and tools including RF. Proficiency in system analysis of noise, linearity, power optimization. In depth knowledge of analog and RF layout techniques. Knowledge of analog and mixed signal IP design including ADCs, DACs, references, oscillators, LDOs is highly desirable. Knowledge of switched power supplies is highly desirable. Intuitive understanding and ability to optimize circuit power, area, and performance. Skill running simulations, doing layout design and performing verification and extraction. Design environment/experience with CAD tools and thorough working knowledge of Cadence design tools. System level design tools (e.g. MatLab). Transistor level design (Cadence Analog artist). Layout tools (Cadence Virtuoso) Verification/extraction. Experimental verification/ATE support. Good communication skills. Able to work in a team environment.</div><div></div><div>
Additional Job Description:</div><div>
Compensation and Benefits</div><div></div><div>
The annual base salary range for this position is $141,300 - $226,000</div><div></div><div>
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.</div><div></div><div>
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.</div><div></div><div>
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.</div><div></div><div>
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.</div></div>

Senior Analog/Mixed Signal Design Engineer/Lead

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Job Description:</div><div></div><div>
Seeking a highly focused and motivated test engineer to join our PCIe Switch Software Test team responsible for understanding test plan, test scenarios, automating test scenarios in Python based test automation framework. The candidate should have an understanding of PCIe protocol - Gen3 and above, system-level understanding of PCIe based designs.</div><div></div><div>
Primary Responsibilities</div><ul><li>
Python based code development</li><li>
Jenkins based test execution</li><li>
Maintaining code in Gerrit</li><li>
Code Reviews</li><li>
Understanding test plans, test scenarios, test configs</li><li>
Prioritize and manage multiple, parallel tasks, projects &amp; releases</li></ul><div></div><div>
Qualifications:</div><ul><li>
Bachelor's degree in Engineering with a minimum of two (2) years of hands-on test experience, or Master's degree in Engineering.</li><li>
Requirements:</li><li>
Strong analytical, problem-solving skills &amp; debugging skills.</li><li>
Possess excellent communication skills and need to be a critical thinker and a self-starter.</li><li>
Experience in developing/utilizing automation scripts in Python &ndash; primarily network and system-level programming using Python.</li><li>
Possess a strong engineering mindset to develop thorough test cases</li><li>
Strong PCIE Experience testing with a good understanding of the following areas:<ul><li>
PCIe Config Space, Link Training, ACS, Hotplug, Virtualization, P2P, BMC interaction, AER/DPC, Backplanes</li></ul></li></ul><div></div><div>
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.</div><div></div><div>
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.</div></div>

R&D Software Engineer

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1. If you are a first time user, please create your candidate login account before you apply for a job.</div><div>
2. If you already have a Candidate Account, please Sign-In before you apply.</div><div></div><div>
Job Description:</div><div></div><div>
Job description,</div><div>
 As part of TLR team (top-level-route), R&amp;D Engineer is primarily responsible for :-</div><div>
1) Place and Route, CTS, Routability analysis with respect to congestion.</div><div>
2) Well versed in physical verification aspect, DRC, LVS, Antenna, LUP, ( chip finishing and Tapeout)</div><div>
3) Meeting RC requirements for manual/special signals</div><div>
4) Good understanding of Calibre DRC/LVS/DFM, DFY, ERC and ESD latchup.</div><div>
5) Responsible for all the integrity checks (chip-finishing) and post Tapeout eJob view release,</div><div>
6) Good scripting knowledge perl and TCL, familiar with Caliber, Innovus,</div><div>
7) Understanding of VLSI fabrication process,</div><div>
8) Implementing timing ECOs. Implementing IR drop fixes, RC extraction, signal EM fixes, and Trans, Cap, Noise fixes.</div><div>
9) Open to new responsibilities in the context of rapid technological change.</div><div>
10) Good communication skills, work closely with the team members to accomplish PD milestone.</div><div>
11) Secondary competencies:- Good understanding of CTS, STA, PTSI and timing.</div><div>
Relevant experience of CAD tools Cadence Innovus, Calibre is preferred.</div><div></div><div>
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.</div><div></div><div>
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.</div></div>

R&D Engineer