Qureos Mentor

Silicon Labs

<div><div>Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world&rsquo;s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at <div>www.silabs.com</div>.</div><div>
The Role :</div><div><div><div><div><div><div><div><div><div><div>
We are seeking a Lead Embedded Software Engineer with deep expertise in ARM architectures (ARMv7/ARMv8), secure embedded systems, and bootloader development. This role is critical in designing and delivering secure platform software and will work closely with cross-functional teams across hardware, firmware, and security engineering.</div><div>
This position is ideal for someone who thrives at the intersection of embedded systems, security, and platform software design and enjoys solving complex technical challenges in resource-constrained environments.</div><div>
Key Responsibilities:</div><ul><li><div>
Design, develop, and maintain secure bootloader(s) for embedded platforms, including secure boot chains, fallback/recovery mechanisms, and update infrastructure.</div></li><li><div>
Implement advanced security hardening techniques such as signed firmware, encryption, anti-rollback protection, secure key storage, and firmware integrity verification.</div></li><li><div>
Work on ARM Cortex-M series processors, leveraging secure/non-secure domain separation (TrustZone), MPU configurations, privilege levels, and memory architecture.</div></li><li><div>
Develop and maintain low-level platform firmware, including drivers for standard peripheral interfaces (SPI, I2C, UART, GPIO, DMA) and RTOS integration.</div></li><li><div>
Lead bring-up of hardware platforms from reset: clock and power initialization, memory setup, and early boot code.</div></li><li><div>
Collaborate across engineering teams to support silicon bring-up, resolve firmware issues, and respond to customer queries.</div></li><li><div>
Conduct peer code reviews, perform static and dynamic analysis, and contribute to security audits and hardening efforts.</div></li><li><div>
Work closely with validation and QA teams to define and execute robust test plans, including unit, integration, stress, and penetration tests.</div></li><li><div>
Create detailed documentation including design decisions, bootloader specs, threat models, and recovery strategies.</div></li><li><div>
Mentor junior engineers and drive best practices in embedded development and secure coding within the team.</div></li><li><div>
Embrace and promote GenAI tools to accelerate development and documentation workflows.</div></li></ul><div>
Required Qualifications:</div><ul><li><div>
8+ years of hands-on experience in embedded software/firmware development.</div></li><li><div>
Deep understanding of ARM architectures (ARMv7, ARMv8) including instruction set, memory maps, privilege levels, and secure modes.</div></li><li><div>
Proven experience designing and implementing secure bootloaders from scratch or significantly enhancing existing ones.</div></li><li><div>
Strong command over peripheral interface development: SPI, I2C, UART, SDIO, GPIO.</div></li><li><div>
Practical experience in secure bootloader features: firmware signing, encryption/decryption, rollback protection, key provisioning.</div></li><li><div>
Excellent debugging skills with low-level firmware, hardware/software interaction, and use of tools like JTAG, SWD, or logic analyzers.</div></li><li><div>
Proficiency in C with a strong focus on clean, modular, and testable code.</div></li><li><div>
Knowledge of embedded RTOS and bare-metal development principles.</div></li><li><div>
Experience with modern development toolchains, CI/CD pipelines, and version control systems.</div></li><li><div>
Familiarity with GenAI tools for accelerating development and documentation is strongly preferred.</div></li></ul><div>
Benefits &amp; Perks<br>
At Silicon Labs, you&rsquo;ll be part of a highly skilled team where every engineer makes a meaningful impact. We promote work-life balance and a welcoming, fun environment.</div><ul><li><div>
Equity Rewards (RSUs)</div></li><li><div>
Employee Stock Purchase Plan (ESPP)</div></li><li><div>
Insurance plans with outpatient cover</div></li><li><div>
National Pension Scheme (NPS)</div></li><li><div>
Flexible work policy</div></li><li><div>
Childcare support</div></li></ul></div></div></div></div></div></div></div></div></div><div></div><div><i>
Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.</i></div></div>

Lead Engineer - SW Design

<div><div>Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world&rsquo;s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at <div>www.silabs.com</div>.</div><div>
TBD</div><div></div><div><i>
Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.</i></div></div>

Engineer I - IC Design

<div><div>Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world&rsquo;s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at <div>www.silabs.com</div>.</div>
TBD<div></div><div><i>
Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.</i></div></div>

Associate Engineer - IC Design

<div><div>Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world&rsquo;s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at <div>www.silabs.com</div>.</div><div></div><div>
Why Silicon Labs:</div><div>
Innovation doesn't start with companies; it starts with people. We put people first in everything we do, whether it&rsquo;s employees we work with every day, our customers developing new devices, or the people in communities where we operate. Our incredibly talented team is comprised of innovative risk-takers pushing the bounds of what&rsquo;s possible. We're problem solvers first, addressing industry&rsquo;s biggest challenges to transform industries, grow economies and improve lives.</div><div></div><div>
The Role:</div><div>
You&rsquo;ll contribute to the design and development of state-of-the-art Wi-Fi/Bluetooth products, focusing on low-power, high-performance RF and analog circuits. You&rsquo;ll work closely with senior engineers, learning the full design flow from concept to silicon validation.</div><div></div><div>
Responsibilities:</div><ul><li>Contribute to the design, simulation, and verification of analog/RF building blocks (LNAs, mixers, baseband filters, dividers, PAs, etc.) in advanced CMOS technologies.</li><li>Support integration and characterization of analog/RF sub-systems such as Rx, Tx, and synthesizer blocks.</li><li>Perform schematic design, transistor-level simulation, and assist in layout verification and reviews.</li><li>Participate in silicon validation and debug, correlating lab measurements with simulations.</li><li>Work with cross-functional teams (system, digital, layout, and test engineering) to ensure successful product integration.</li><li>Support documentation and review processes for design blocks.</li><li>Apply low-power design principles and techniques to meet aggressive power and performance targets.</li></ul><div></div><div>
Preferred Skills:</div><ul><li>Experience in Analog/Mixed signal/RFIC circuit design in CMOS</li><li>Prior experience in designing one or more of the following RF circuits in CMOS (0.13u or lower geometries): LNAs, Mixers(active/Passive), Baseband Filters, I/Q data converters, High frequency LO Dividers, High power CMOS Pas</li><li>Experience with EM modeling tools and passive components (inductors, transformers) is a plus.</li><li>Basic scripting knowledge in Python, SKILL, Shell, etc. for design automation is desirable.</li><li>Good understanding of RF system fundamentals, modulation/demodulation, and wireless transceiver architectures.</li><li>Good understanding of device noise, mismatch, linearity, and other RF and analog impairments</li><li>Strong knowledge of RF design and implementation techniques</li><li>Proficiency in Cadence Design Environment for Analog, Mixed-Signal and RF designs (Cadence Analog Artist, Cadence Virtuoso, SpectreRF, EMX, AFS etc.)</li><li>Ability to drive strong production test/QA methodologies</li><li>Excellent written and verbal presentation skills required.</li></ul><div></div><div>
Minimum Qualifications:</div><div></div><div>
Senior Engineer: 3&ndash;6 years of relevant industry experience.</div><div>
BS/MS/MSc/Ph. D in Electronics/ Electrical/ Integrated Circuits Engineering</div><div></div><div>
Benefits &amp; Perks:</div><div>
Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.</div><ul><li>
Equity Rewards (RSUs)</li><li>
Employee Stock Purchase Plan (ESPP)</li><li>
Insurance plans with Outpatient cover</li><li>
National Pension Scheme (NPS)</li><li>
Flexible work policy</li><li>
Childcare support</li></ul><div></div><div><i>
Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.</i></div></div>

Senior Engineer - Analog/Mixed signal/RFIC circuit design in CMOS (3 to 6years)

<div><div>Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world&rsquo;s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at <div>www.silabs.com</div>.</div><div>
Role Overview</div><div>
The RTL Design Engineer for Mixed-Signal IPs is responsible for developing, integrating, and verifying digital RTL blocks within mixed-signal subsystems that combine analog and digital functionalities. This role requires a deep understanding of digital design principles, interface with analog/mixed-signal teams, and strong verification and integration skills to ensure high-quality, low-power, and functionally robust IP delivery. The engineer will work closely with system architects, analog designers, and SoC teams to enable seamless integration of mixed-signal IPs into complex SoCs.</div><div>
Key Responsibilities</div><ul><li>
Develop synthesizable, high-quality RTL for mixed-signal IPs such as ADC/DAC interfaces, PLL/DLL control, power management units, and sensor front-ends.</li><li>
Collaborate with analog design engineers to define digital-analog interface specifications, control logic, and communication protocols.</li><li>
Ensure correct functionality and performance of mixed-signal IPs through behavioral modeling, simulation, and co-verification with analog components.</li><li>
Participate in design reviews, micro-architecture definition, and documentation of IP functionality and timing interfaces.</li><li>
Perform design quality checks including lint, CDC, RDC, and synthesis readiness analyses.</li><li>
Collaborate with verification engineers to define test plans, drive coverage closure, and debug issues across digital and analog boundaries.</li><li>
Integrate mixed-signal IPs into SoC top-level RTL and resolve functional or timing issues during full-chip validation.</li><li>
Contribute to continuous improvement of design methodologies, automation scripts, and reuse strategies for mixed-signal IP development.</li></ul><div>
Qualifications</div><ul><li>
5&ndash;10 years of experience in digital RTL design with strong exposure to mixed-signal IP or subsystem development.</li><li>
Proficiency in Verilog/SystemVerilog and experience with synthesis and static verification flows (lint, CDC).</li><li>
Familiarity with analog/mixed-signal concepts such as signal sampling, clocking, calibration, and power management.</li><li>
Hands-on experience with mixed-signal co-simulation tools (Cadence AMS Designer, Synopsys VCS AMS, etc.) is a plus.</li><li>
Good understanding of digital communication protocols (SPI, I2C, APB, AXI).</li><li>
Exposure to scripting (Python, Perl, TCL) for automation and design flow enhancements.</li><li>
Experience working in cross-functional environments involving analog, verification, and SoC integration teams.</li></ul><div>
Education</div><ul><li>
B.E./B.Tech or M.S./M.Tech in Electrical Engineering, Electronics, or Computer Engineering.</li></ul><div>
Key Competencies</div><ul><li>
Strong understanding of digital design and verification fundamentals.</li><li>
Ability to work effectively across analog and digital domains in a collaborative environment.x</li><li>
Excellent debugging, problem-solving, and analytical skills.</li><li>
Good communication and documentation abilities.</li><li>
Passion for quality, efficiency, and innovation in mixed-signal IP design.</li></ul><div>
Success Metrics</div><ul><li>
Timely delivery of functionally correct and synthesis-ready RTL for mixed-signal IPs.</li><li>
High quality and robustness verified through simulation, lint, and CDC sign-off.</li><li>
Effective collaboration with analog and SoC teams ensuring smooth IP integration.</li><li>
Contributions to methodology and flow improvements enhancing team efficiency.</li></ul><div>
Benefits &amp; Perks :</div><div>
Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.</div><ul><li>
Equity Rewards (RSUs)</li><li>
Employee Stock Purchase Plan (ESPP)</li><li>
Insurance plans with Outpatient cover</li><li>
National Pension Scheme (NPS)</li><li>
Flexible work policy</li><li>
Childcare support</li></ul><div></div><div><i>
Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.</i></div></div>

Lead RTL Design Engineer - ( Mixed-Signal IPs)

<div><div>Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world&rsquo;s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at <div>www.silabs.com</div>.</div><div>
Role Overview</div><div>
The RTL Design Director leads the front-end design organization responsible for specification, RTL development, and delivery of high-quality, verified RTL and associated collateral for multiple SoCs. The role requires a deep understanding of digital design, SoC integration, architecture, and verification practices, combined with strong technical leadership and program management skills to deliver on schedule, power, performance, and area (PPA) targets.</div><div>
Key Responsibilities</div><div>
Strategic Leadership</div><ul><li>
Define and execute the RTL design strategy and roadmap aligned with SoC and product requirements.</li><ul><li>Partner with SoC architects, verification, physical design, and firmware teams to ensure seamless integration and first-time-right silicon.</li></ul><li>
Drive methodology, tool, and flow improvements across RTL development, linting, CDC, synthesis readiness, and power analysis.</li><li>
Build and mentor a high-performing global RTL design team, fostering technical excellence and collaboration.</li></ul><div>
Technical Execution</div><ul><li>
Own RTL development for complex SoCs &mdash; from block design through SoC integration.</li><li>
Ensure high-quality deliverables through design reviews, coding standards, and rigorous sign-off criteria (lint, CDC, DFT readiness, coverage closure).</li><li>
Collaborate with architecture and verification teams to interpret specifications, drive micro-architecture decisions, and resolve functional issues.</li><li>
Oversee IP integration, interface definition, and interconnect design for multi-subsystem SoCs.</li><li>
Ensure deliverables meet timing, area, power, and functional goals through tight collaboration with physical design and STA teams.</li><li>
Lead the generation of SoC-level collateral &mdash; integration guidelines, configuration files, simulation models, and documentation.</li></ul><div>
Program and Cross-Functional Management</div><ul><li>
Manage multiple SoC programs simultaneously, balancing resource allocation, risk, and delivery schedules.</li><li>
Interface with program management to track milestones and mitigate schedule or technical risks.</li><li>
Coordinate across global design centers to ensure design consistency, reuse, and alignment with corporate design methodology.</li><li>
Represent RTL design organization in design reviews, customer engagements, and executive updates.</li></ul><div>
Qualifications &amp; Experience</div><ul><li>
15+ years of experience in digital design and SoC development, with at least 5 years in leadership/director capacity.</li><li>
Proven track record of leading RTL design teams delivering complex, multi-million gate SoCs to silicon.</li><li>
Strong experience with ARM-based subsystems, bus architectures (AMBA, AXI, ACE, etc.), and low-power design techniques.</li><li>
Exposure to front-end EDA tools (Synopsys, Cadence, Siemens) for lint, CDC, synthesis, and simulation.</li><li>
Hands-on familiarity with modern verification environments (UVM, constrained random, formal).</li><li>
Experience with cross-site teams and distributed design execution.</li></ul><div></div><div>
Education</div><ul><li>
B.E./B.Tech or M.S./M.Tech in Electrical Engineering, Electronics, or Computer Engineering.</li><li>
Key Competencies</li><li>
Deep technical acumen in digital design and SoC architecture.</li><li>
Excellent leadership, mentoring, and communication skills.</li><li>
Strong organizational and program management abilities.</li><li>
Strategic thinker with a bias for execution and collaboration.</li></ul><div>
Success Metrics</div><ul><li>
On-time delivery of high-quality RTL for multiple SoCs.</li><li>
Achievement of first-silicon success.</li><li>
Reduction in design cycle time via methodology and automation improvements.</li><li>
Team development, retention, and technical depth growth</li></ul><div>
Benefits &amp; Perks</div><div>
At Silicon Labs, you&rsquo;ll be part of a highly skilled team where every engineer makes a meaningful impact. We promote work-life balance and a welcoming, fun environment.</div><ul><li><div>
Equity Rewards (RSUs)</div></li><li><div>
Employee Stock Purchase Plan (ESPP)</div></li><li><div>
Insurance plans with outpatient cover</div></li><li><div>
National Pension Scheme (NPS)</div></li><li><div>
Flexible work policy</div></li><li><div>
Childcare support</div></li></ul><div></div><div><i>
Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.</i></div></div>

Director - IC Design(Front End)

Join Silicon Labs and explore 6   exciting career opportunities. They're hiring for various roles with options for remote or on-site work. Apply today and become part of their innovative team.