- ASIC
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Location: Bangalore
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Experience: 3 - 6 Years
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Perform Sub-system and Chip level AMS simulations.
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Perform full-chip level fast-spice simulations.
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Experience with Cadence, Finesim, Questa ADMS, HSPICE or equivalent tools required.
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Good understanding of analog macros such as Buck, LDO, ADC/DAC, PLL, Oscillator, Bandgap, Comparator, etc.
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Should be able to review and understand chip level electrical specifications and requirements for analog macros.
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BSEE minimum, MSEE preferred from an accredited engineering school.
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3-6 years of experience working in an IC development environment.
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Additional experience in circuit level debug is highly desirable.
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Explore new flows and simulation tools and ideas for continuous improvement.
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Experience with scripting languages like perl, skill, tcl or equivalent to automate flows is a plus.
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Willingness to learn new skills and apply new technologies.
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Strong communication skills and the ability to collaborate in a global team is essential.
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Self-motivated, ability to work independently and excel in team environment.
To learn more about Siliciom Technologies, please contact us at careers@siliciom.com