Design Engineer (Remote)

• Role : Design Engineer (Remote)
• Employment Type: Full-Time
• Location: Sunnyvale, California, United States
• Compensation: $100 – $135 per hour

Role Overview

We are seeking an experienced ASIC Power Engineer to support power analysis and optimization for advanced ASIC designs used in next-generation AR/VR products. This role focuses on improving power efficiency while maintaining performance and area targets in complex semiconductor designs.

The ideal candidate will have strong experience in ASIC design flows, power analysis methodologies, and scripting for automation and data analysis. The role also involves collaboration with cross-functional engineering teams to support power optimization throughout the design lifecycle.

Key Responsibilities

• Perform PPA (Power, Performance, Area) optimization using synthesis and design tools such as Fusion Compiler
• Conduct RTL and netlist-level power analysis for ASIC designs
• Develop scripts and perform post-processing on report log files for data extraction, analysis, and formatting
• Set up, run, debug, and analyze reports from ASIC design flows including Synthesis, Physical Design, Power, and Timing
• Implement selected blocks at RTL level and UPF power intent specifications
• Collaborate with design and physical implementation teams to improve power efficiency
• Document methodologies, results, and findings clearly

Required Qualifications

• 10+ years of experience as an ASIC Power Engineer, CAD Engineer, or Physical Design Engineer
• Strong experience with power estimation tools, synthesis, and some physical design flows
• Understanding of power trade-offs in design and backend implementation
• Hands-on experience with scripting and data analysis
• Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience

Preferred Qualifications

• Experience with industry tools such as:
• Synopsys: DC, ICC, PTPX / PrimePower, VCS, Verdi
• Cadence: Joules
• Strong scripting skills in Python, Perl, or similar languages
• Experience using Excel or MATLAB for data visualization, modeling, and analysis
• Familiarity with low-power design methodologies and UPF power intent specifications
• Experience with silicon power characterization
• Knowledge of power profiling at IP or SoC level

Work Environment

• Full-time engineering role supporting advanced semiconductor design initiatives
• Collaboration with cross-functional engineering teams
• Work on high-impact technologies including AR/VR and machine learning hardware systems

Equal Opportunity Statement

All qualified applicants will be considered without regard to legally protected characteristics. Reasonable accommodations are available upon request.

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