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Hello Everyone!!!,

Greetings from ElevarSoC

We are hiring DFT Engineer with 2-3 Years of Experience for Hyderabad location.

Notice Period : Immediate / 2 weeks preferred*

Below the jd

1. DFT pattern generation, verification and delivery to ATE team.

2. Gate Level simulation with and without timing.

3. Post silicon experience and support on failing patterns.

Good experience on EDA tools of reputed vendor like Mentor, Synopsis.

Job Description : Candidate to generate ATPG patterns for different fault models SAF/TDF/IDDQ etc. Simulate them in Notiming & Timing. Release them for ATE validation & support any post silicon debug, if required.

Apply Now!!!

Job Types: Full-time, Permanent

Pay: ₹340,946.57 - ₹1,454,207.79 per year

Work Location: In person

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