asic design engineer

Syntiant Corp

<p></p><div><div><div><div><div><div><p>Syntiant Corp., a leader in the high-growth AI software and semiconductor solutions space, is looking for an experienced and talented <b>Senior Staff ASIC Design Engineer</b> to take on a critical role with expansive responsibilities to enhance the Hardware Engineering function in a growing organization.</p><p>
As <b>Digital ASIC Design Engineer</b>, you will be a key player in the ASIC R&amp;D team. You are presented with a unique opportunity to be part of the complete digital ASIC design flow, from specification and modelling, implementation and verification, to synthesis and silicon bring-up. Further, you will play an important role in supporting complex failure analyses to ensure smooth ramp-ups and high-volume production.</p><p><b>
Specific Duties and Responsibilities</b><b>:</b></p><ul>
<li>Architect &amp; implement Syntiant&rsquo;s next-generation Neural Digital Processor (NDP) for low-power edge AI applications.</li>
<li>Work closely with Machine Learning (ML) team to analyze, map &amp; co-optimize state-of-the-art neural network models to Syntiant&rsquo;s current and next-generation NDP engine.</li>
<li>Create power and performance profiling tool for NDP engine.</li>
<li>Lead PPA (Power/Performance/Area) tradeoff analysis to improve design.</li>
<li>Pre-/post-silicon design validation and performance testing.</li>
</ul></div></div><div><h2 class="jobSectionHeader"><b>Requirements</b></h2><div><p><b>
Qualifications, Education, and Experience Required:</b></p><ul>
<li>Minimum Masters degree in electrical engineering, PhD preferred .</li>
<li>A proven track record of 5+ years in developing low-power signal processing IPs from architecture to implementation.</li>
<li>Hands-on experience developing IPs using SystemC HLS (High-Level Synthesis).</li>
<li>Good knowledge and experience in architecture/design of NPUs.</li>
<li>Good knowledge in ML network architecture (Dense, CNN, RNN, Transformer, etc).</li>
<li>RTL implementation of Digital Signal Processing algorithms, using Verilog or System Verilog.</li>
<li>Implementation of test benches and digital verification methods.</li>
<li>Experience in PPA (Power/Performance/Area) optimizations.</li>
<li>Programming/scripting languages (e.g., Python, C/C++, or Perl).</li>
<li>Task centered, self-driven, persistent, and team oriented.</li>
<li>Experience with ML frameworks (Tensorflow, PyTorch, etc.) is a plus.</li>
</ul></div></div><div><h2 class="jobSectionHeader"><b>Benefits</b></h2><div><p><b>
Benefits Summary:</b></p><ul>
<li><b>Medical:</b> Several plan options including PPO and HSA-compatible plans from Anthem Blue Cross, most of which are 100% paid by Syntiant Corp. for you and your family.</li>
<li><b>Dental:</b> Company-paid dental PPO coverage from MetLife, including coverage for Orthodontia.</li>
<li><b>Vision:</b> Company-paid vision PPO coverage from MetLife / VSP.</li>
<li><b>Life Insurance / AD&amp;D:</b> Company-paid basic Life / AD&amp;D coverage in the amount of 3x your salary (up to $1,000,000). Additional supplemental life insurance with low group rates is available for yourself and your family.</li>
<li><b>Disability Coverage:</b> Company-paid Short Term and Long-Term Disability coverage provides up to 60% income replacement protection.</li>
<li><b>Spending and Savings Accounts:</b> Flexible Spending Account (FSA) benefits for Health Care and Dependent Care. Health Savings Accounts (HSA) for those enrolled in a qualified Medical plan.</li>
<li><b>401K Retirement Plan: </b>Administered by Empower, the 401(k) plan allows you to plan for your future by investing a portion of each paycheck.</li>
<li><b>Other Benefits:</b> A company-provided Employee Assistance Program (EAP), as well as access to additional voluntary benefits including Accident, Critical Illness, Hospital Indemnity, Legal Support, and Identity Fraud Protection.</li>
</ul><p><b>About Syntiant</b><b>:</b></p><p>
Founded in 2017 and headquartered in Irvine, Calif., Syntiant Corp. is a leader in delivering hardware and software solutions for edge AI deployment. The company&rsquo;s purpose-built silicon and hardware-agnostic models are being deployed globally to power edge AI speech, audio, sensor and vision applications across a wide range of consumer and industrial use cases, from earbuds to automobiles. Syntiant&rsquo;s advanced chip solutions merge deep learning with semiconductor design to produce ultra-low-power, high performance, deep neural network processors. Syntiant also provides compute-efficient software solutions with proprietary model architectures that enable world-leading inference speed and minimized memory footprint across a broad range of processors. The company is backed by several of the world&rsquo;s leading strategic and financial investors including Intel Capital, Microsoft&rsquo;s M12, Applied Ventures, Bosch Ventures, the Amazon Alexa Fund, and Atlantic Bridge Capital. More information on the company can be found by visiting <b>http://www.syntiant.com/</b>.</p><p>
One element in our total compensation package is base pay. The starting base pay for this role is targeted to be between $165,000 - $185,000, in addition, this role is eligible for our annual incentive plan bonus at 10% of base. Individual compensation decisions are based on a number of factors, including but not limited to previous experience and skills acquired prior to joining Syntiant, cost of living in the assigned work location, assigned schedule, and salaries of similarly situated peers at the company. It is to be expected that candidates will come to us with different sets of skills and experiences and therefore will be paid at different points in the stated range. We recognize that the person(s) we select for hire may be less experienced or more experienced than the role as posted; if this is the case, any updates to available salary ranges will be communicated with candidates during the recruitment process.</p></div></div></div></div></div></div><p></p>

Senior Staff ASIC Design Engineer, Neural Processor

<p></p><div><div><div><div><div><div><p>Syntiant Corp., a leader in the high-growth AI software and semiconductor solutions space, is looking for an experienced and talented <b>Senior Staff ASIC Design Engineer</b> to take on a critical role with expansive responsibilities to enhance the Hardware Engineering function in a growing organization.</p><p>
As <b>Digital ASIC Design Engineer</b>, you will be a key player in the ASIC R&amp;D team. You are presented with a unique opportunity to be part of the complete digital ASIC design flow, from specification and modelling, implementation and verification, to synthesis and silicon bring-up. Further, you will play an important role in supporting complex failure analyses to ensure smooth ramp-ups and high-volume production.</p><p><b>
Specific Duties and Responsibilities</b><b>:</b></p><ul>
<li>Architect &amp; implement Syntiant&rsquo;s next-generation Neural Digital Processor (NDP) for low-power edge AI applications.</li>
<li>Work closely with Machine Learning (ML) team to analyze, map &amp; co-optimize state-of-the-art neural network models to Syntiant&rsquo;s current and next-generation NDP engine.</li>
<li>Create power and performance profiling tool for NDP engine.</li>
<li>Lead PPA (Power/Performance/Area) tradeoff analysis to improve design.</li>
<li>Pre-/post-silicon design validation and performance testing.</li>
</ul></div></div><div><h2 class="jobSectionHeader"><b>Requirements</b></h2><div><p><b>
Qualifications, Education, and Experience Required:</b></p><ul>
<li>Minimum Masters degree in electrical engineering, PhD preferred .</li>
<li>A proven track record of 5+ years in developing low-power signal processing IPs from architecture to implementation.</li>
<li>Hands-on experience developing IPs using SystemC HLS (High-Level Synthesis).</li>
<li>Good knowledge and experience in architecture/design of NPUs.</li>
<li>Good knowledge in ML network architecture (Dense, CNN, RNN, Transformer, etc).</li>
<li>RTL implementation of Digital Signal Processing algorithms, using Verilog or System Verilog.</li>
<li>Implementation of test benches and digital verification methods.</li>
<li>Experience in PPA (Power/Performance/Area) optimizations.</li>
<li>Programming/scripting languages (e.g., Python, C/C++, or Perl).</li>
<li>Task centered, self-driven, persistent, and team oriented.</li>
<li>Experience with ML frameworks (Tensorflow, PyTorch, etc.) is a plus.</li>
</ul></div></div><div><h2 class="jobSectionHeader"><b>Benefits</b></h2><div><p><b>
Benefits Summary:</b></p><ul>
<li><b>Medical:</b> Several plan options including PPO and HSA-compatible plans from Anthem Blue Cross, most of which are 100% paid by Syntiant Corp. for you and your family.</li>
<li><b>Dental:</b> Company-paid dental PPO coverage from MetLife, including coverage for Orthodontia.</li>
<li><b>Vision:</b> Company-paid vision PPO coverage from MetLife / VSP.</li>
<li><b>Life Insurance / AD&amp;D:</b> Company-paid basic Life / AD&amp;D coverage in the amount of 3x your salary (up to $1,000,000). Additional supplemental life insurance with low group rates is available for yourself and your family.</li>
<li><b>Disability Coverage:</b> Company-paid Short Term and Long-Term Disability coverage provides up to 60% income replacement protection.</li>
<li><b>Spending and Savings Accounts:</b> Flexible Spending Account (FSA) benefits for Health Care and Dependent Care. Health Savings Accounts (HSA) for those enrolled in a qualified Medical plan.</li>
<li><b>401K Retirement Plan: </b>Administered by Empower, the 401(k) plan allows you to plan for your future by investing a portion of each paycheck.</li>
<li><b>Other Benefits:</b> A company-provided Employee Assistance Program (EAP), as well as access to additional voluntary benefits including Accident, Critical Illness, Hospital Indemnity, Legal Support, and Identity Fraud Protection.</li>
</ul><p><b>About Syntiant</b><b>:</b></p><p>
Founded in 2017 and headquartered in Irvine, Calif., Syntiant Corp. is a leader in delivering hardware and software solutions for edge AI deployment. The company&rsquo;s purpose-built silicon and hardware-agnostic models are being deployed globally to power edge AI speech, audio, sensor and vision applications across a wide range of consumer and industrial use cases, from earbuds to automobiles. Syntiant&rsquo;s advanced chip solutions merge deep learning with semiconductor design to produce ultra-low-power, high performance, deep neural network processors. Syntiant also provides compute-efficient software solutions with proprietary model architectures that enable world-leading inference speed and minimized memory footprint across a broad range of processors. The company is backed by several of the world&rsquo;s leading strategic and financial investors including Intel Capital, Microsoft&rsquo;s M12, Applied Ventures, Bosch Ventures, the Amazon Alexa Fund, and Atlantic Bridge Capital. More information on the company can be found by visiting<b> www.syntiant.com</b>.</p><p>
One element in our total compensation package is base pay. The starting base pay for this role is targeted to be between $165,000 - $185,000, in addition, this role is eligible for our annual incentive plan bonus at 10% of base. Individual compensation decisions are based on a number of factors, including but not limited to previous experience and skills acquired prior to joining Syntiant, cost of living in the assigned work location, assigned schedule, and salaries of similarly situated peers at the company. It is to be expected that candidates will come to us with different sets of skills and experiences and therefore will be paid at different points in the stated range. We recognize that the person(s) we select for hire may be less experienced or more experienced than the role as posted; if this is the case, any updates to available salary ranges will be communicated with candidates during the recruitment process.</p></div></div></div></div></div></div><p></p>

NVIDIA

<div><div><div><div><p>NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of its Graphics team working on the design of state of the art memory subsystem components used in their industry-leading Graphics Processors. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.</p><p></p><p>
In this position, you will be expected to make architectural trade-offs based on features, performance requirements and system limitations, come up with micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. You will work with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and backend teams to accomplish your tasks.</p><p></p><p><b>
What you&rsquo;ll be doing:</b></p><ul><li><p>
Own micro-architecture and RTL development of design modules.</p></li><li><p>
Micro-architect features to meet performance, power and area requirements.</p></li><li><p>
Work with HW architects to define critical features.</p></li><li><p>
Collaborate with verification teams to verify the correctness of implemented features.</p></li><li><p>
Co-operate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.</p></li><li><p>
Interact with FPGA and S/W teams to prototype the design and ensure that S/W is tested.</p></li><li><p>
Work on post-silicon verification and debug.</p></li></ul><p></p><p><b>
What we need to see:
</b></p><ul><li><p>BS / MS or equivalent experience.</p></li><li><p>
5+ years of design experience.</p></li><li><p>
Experience in RTL design of complex design units for at least two or three projects.</p></li><li><p>
Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).</p></li><li><p>
Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up &amp; lab debug.</p></li><li><p>
Expertise in Verilog.</p></li></ul><p></p><p><b>
Ways to stand out from the crowd:
</b></p><ul><li><p>Design experience in memory subsystem or network interconnect IP.</p></li><li><p>
Good debugging and problem solving skills.</p></li><li><p>
Scripting knowledge (Python/Perl/shell).</p></li><li><p>
Leadership experience in leading small 2-3 member teams.</p></li><li><p>
Good interpersonal skills and ability &amp; desire to work as a part of a team.</p></li></ul><p></p><p>
NVIDIA is widely considered to be one of the technology world&rsquo;s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you.</p><p></p><p>
We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.</p><p></p><p>
#LI-Hybrid</p></div></div></div></div><p></p>

Senior ASIC Design Engineer - XBAR IP

Amazon Web Services

<div><h2 class="jobSectionHeader"><b>DESCRIPTION</b></h2><div>
Utility Computing (UC)<br>
AWS Utility Computing (UC) provides product innovations &mdash; from foundational services such as Amazon&rsquo;s Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS&rsquo;s services and features apart in the industry. As a member of the UC organization, you&rsquo;ll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for customers who require specialized security solutions for their cloud services.<br>
<br>
Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago&mdash;even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.<br>
<br>
About AWS<br>
Amazon Web Services (AWS) is the world&rsquo;s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating &mdash; that&rsquo;s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.<br>
<br>
Diverse Experiences<br>
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn&rsquo;t followed a traditional path, or includes alternative experiences, don&rsquo;t let it stop you from applying.
<br>
<br>
Work/Life Balance<br>
We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there&rsquo;s nothing we can&rsquo;t achieve in the cloud.
<br>
<br>
Inclusive Team Culture<br>
Here at AWS, it&rsquo;s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness.<br>
<br>
Mentorship &amp; Career Growth<br>
We&rsquo;re continuously raising our performance bar as we strive to become Earth&rsquo;s Best Employer. That&rsquo;s why you&rsquo;ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.
<br>
<br>
Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you&rsquo;ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we&rsquo;re handling massive scale and rapid integration of emergent technologies. We&rsquo;re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.<br>
<br>
Key job responsibilities<br>
<ul><li>integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing</li><li>As a key member of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.</li><li>Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.</li><li>Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.</li><li>Perform lint and clock domain crossing quality checks on the design.</li></ul>
- Work with with architects, other designers, verification teams, pre- and post-silicon validation teams, synthesis, timing and back-end teams to accomplish your tasks.<br>
<br>
You will thrive in this role if you:<br>
<ul><li>Are familiar with scripting in Python</li><li>Are proficient with assertions</li><li>Have good debug skills to analyze RTL test failures</li><li>Have a &quot;Learn and Be Curious&quot; mindset</li></ul><br>
About the team<br>
Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you&rsquo;ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we&rsquo;re handling massive scale and rapid integration of emergent technologies. We&rsquo;re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.<br>
<br>
Our team is dedicated to supporting new members. We have a broad mix of experience levels and tenures, and we&rsquo;re building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind, code reviews. We care about your career growth and strive to assign projects that help our team members develop your engineering expertise so you feel empowered to take on more complex tasks in the future.</div><h2 class="jobSectionHeader"><b>
BASIC QUALIFICATIONS</b></h2><ul><li>Bachelor's degree in electrical engineering or equivalent</li><li>5+ years in RTL design for SOC</li><li>5+ years of VLSI engineering</li><li>5+ years with code quality tools including: Spyglass, LINT, or CDC</li></ul><h2 class="jobSectionHeader"><b>
PREFERRED QUALIFICATIONS</b></h2><ul><li>Master's degree in electrical engineering, computer engineering, or equivalent</li><li>Experience scripting for automation (e.g., Python, Perl, Ruby)</li><li>Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints</li><li>Familiarity with data path design, interconnects, AXI protocol</li><li>Good analytical, problem solving, and communication skills</li></ul><br>
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.<br>
<br>
Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company&rsquo;s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.<br>
<br>
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you&rsquo;re applying in isn&rsquo;t listed, please contact your Recruiting Partner.<br>
<br>
Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $143,300/year in our lowest geographic market up to $247,600/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit https://www.aboutamazon.com/workplace/employee-benefits. This position will remain posted until filled. Applicants should apply via our internal or external career site.</div>

Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team

<div><h2 class="jobSectionHeader"><b>DESCRIPTION</b></h2><div>
Utility Computing (UC)<br>
AWS Utility Computing (UC) provides product innovations &mdash; from foundational services such as Amazon&rsquo;s Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS&rsquo;s services and features apart in the industry. As a member of the UC organization, you&rsquo;ll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for customers who require specialized security solutions for their cloud services.<br>
<br>
Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago&mdash;even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.<br>
<br>
About AWS<br>
Amazon Web Services (AWS) is the world&rsquo;s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating &mdash; that&rsquo;s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.<br>
<br>
Diverse Experiences<br>
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn&rsquo;t followed a traditional path, or includes alternative experiences, don&rsquo;t let it stop you from applying.
<br>
<br>
Work/Life Balance<br>
We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there&rsquo;s nothing we can&rsquo;t achieve in the cloud.
<br>
<br>
Inclusive Team Culture<br>
Here at AWS, it&rsquo;s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness.<br>
<br>
Mentorship &amp; Career Growth<br>
We&rsquo;re continuously raising our performance bar as we strive to become Earth&rsquo;s Best Employer. That&rsquo;s why you&rsquo;ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.
<br>
<br>
Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you&rsquo;ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we&rsquo;re handling massive scale and rapid integration of emergent technologies. We&rsquo;re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.<br>
<br>
Key job responsibilities<br>
<ul><li>integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing</li><li>As a key member of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.</li><li>Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.</li><li>Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.</li><li>Perform lint and clock domain crossing quality checks on the design.</li></ul>
- Work with with architects, other designers, verification teams, pre- and post-silicon validation teams, synthesis, timing and back-end teams to accomplish your tasks.<br>
<br>
You will thrive in this role if you:<br>
<ul><li>Are familiar with scripting in Python</li><li>Are proficient with assertions</li><li>Have good debug skills to analyze RTL test failures</li><li>Have a &quot;Learn and Be Curious&quot; mindset</li></ul><br>
About the team<br>
Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you&rsquo;ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we&rsquo;re handling massive scale and rapid integration of emergent technologies. We&rsquo;re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.<br>
<br>
Our team is dedicated to supporting new members. We have a broad mix of experience levels and tenures, and we&rsquo;re building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind, code reviews. We care about your career growth and strive to assign projects that help our team members develop your engineering expertise so you feel empowered to take on more complex tasks in the future.</div><h2 class="jobSectionHeader"><b>
BASIC QUALIFICATIONS</b></h2><ul><li>BS degree in electrical engineering or equivalent</li><li>3+ years in RTL design for SOC</li><li>3+ years of VLSI engineering</li><li>3+ years with code quality tools including: Spyglass, LINT, or CDC</li></ul><h2 class="jobSectionHeader"><b>
PREFERRED QUALIFICATIONS</b></h2><ul><li>Experience scripting for automation (e.g., Python, Perl, Ruby)</li><li>Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints</li><li>Familiarity with data path design, interconnects, AXI protocol</li><li>Good analytical, problem solving, and communication skills</li></ul><br>
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.<br>
<br>
Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company&rsquo;s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.<br>
<br>
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you&rsquo;re applying in isn&rsquo;t listed, please contact your Recruiting Partner.<br>
<br>
Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $129,800/year in our lowest geographic market up to $212,800/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit https://www.aboutamazon.com/workplace/employee-benefits. This position will remain posted until filled. Applicants should apply via our internal or external career site.</div>

ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team

Algowire Trading Technologies pvt .ltd

<p><b>Job Description</b></p><p><b>Experience - 0 to 3 years</b></p><p><b>Location</b>: Noida</p><p><b>Job Title: Hardware Engineer</b></p><p>o Knowledge in FPGA/ASIC based design and verification.<br/>o Expertise in C programming.<br/>o Design in VHDL , Verilog and System Verilog.<br/>o Knowledge in working with Xillinx IDE/tool chain (ISE/Vivado)Job Description<br/>Knowledge of <b>FPGA</b> programming from requirements till validation<br/>-Knowledge in Verilog / System Verilog / VHDL<b>Role Category:</b>Programming &amp; DesignRole:Hardware Design Engineer / Programmer AnalystKeyskills<br/>FPGAXilinxProgramming (C/C++)validationKnowledge of FPGA programming from requirements till validation</p><p>Knowledge in Verilog / System Verilog / VHDL</p><p>Good understanding of communication protocols, network communication.</p><p>Keyskills:</p><p>FPGA</p><p>Verilog/System Verilog/VHDL</p><p>Programming (C/C++)</p><p>Xilinx Vivado</p><p>Job Type: Full-time</p><p>Pay: Up to &#8377;360,000.00 per year</p><p>Ability to commute/relocate:</p><ul><li>Noida, Uttar Pradesh: Reliably commute or planning to relocate before starting work (Required)</li></ul><p>Education:</p><ul><li>Bachelor's (Preferred)</li></ul><p>Experience:</p><ul><li>total work: 3 years (Preferred)</li></ul>

Hardware Engineer

Algowire Trading Technologies Pvt Ltd

<p><b>Experience: </b>0-3 yrs</p><p><b>Job Location</b>: Sector-64, Noida</p><p><b>Work Culture</b>: Work from office only (6 days a week)</p><p><b>Job Title: Hardware Design Engineer / Programmer Analyst</b></p><ul><li>Knowledge in FPGA/ASIC based design and verification.</li><li>Expertise in C programming.</li><li>Design in VHDL , Verilog and System Verilog.</li><li>Knowledge in working with Xillinx IDE/tool chain (ISE/Vivado).</li></ul><p><b>Job Description</b></p><ul><li>Knowledge of <b>FPGA</b> programming from requirements till validation</li><li>Knowledge in Verilog / System Verilog / VHDL</li></ul><p>Job Types: Full-time, Permanent</p><p>Pay: &#8377;200,000.00 - &#8377;500,000.00 per year</p><p>Application Question(s):</p><ul><li>Will you be available for F2F Interview in Noida?</li><li>How much experience/ knowledge in Verilog/ FPGA?</li></ul><p>Experience:</p><ul><li>total work: 1 year (Required)</li></ul><p>Work Location: In person</p>

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