asic design engineer

NXP Semiconductors

<div><ul><li><b>Key Responsibilities
</b></li><li>Define and implement hardware architectures optimized for <b>AI inference SOC's
</b></li><li>Contribute to micro-architecture definition and evaluate design trade-offs for complex SOC including custom-ISA based processors, high-speed interconnects &amp; high-bandwidth IO's
</li>Own features end-to-end: specification RTL integration synthesis<li> debug
</li><li>Collaborate with physical design teams on synthesis, timing closure, and power optimization.
</li><li>Collaborate with verification team to ensure design correctness.
</li><li>Work with architect engineers to model workloads, analyze performance bottlenecks, and validate AI inference use cases.
</li></ul><p></p><ul><li><b>Required Qualifications
</b></li><li>7+ years of experience in ASIC/SoC RTL design
</li><li>Strong Verilog/SystemVerilog coding skills
</li><li>Solid understanding of synthesis, timing, and power analysis
</li><li>Experience with Lint/CDC/RDC flows
</li>Strong debugging and root-cause analysis capability<br>
<li>
</li></ul><p></p><p><br>
More information about NXP in India...
</p><p></p>#LI-2734</div>

Sr. Lead ASIC design Engineer - Digital Design

Amazon.com

<div><h2 class="jobSectionHeader"><b>DESCRIPTION</b></h2><div>
Amazon Leo is Amazon&rsquo;s low Earth orbit satellite network. Our mission is to deliver fast, reliable internet connectivity to customers beyond the reach of existing networks. From individual households to schools, hospitals, businesses, and government agencies, Amazon Leo will serve people and organizations operating in locations without reliable connectivity.<br>
<br>
The Role:<br>
Be part of Amazon Leo&rsquo;s sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies.<br>
<br>
In this role you will:<br>
<ul><li>Implement a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models</li><li>Develop detailed test plans and write tests, run regressions, collect coverage matrices and report progress to the program</li><li>Participate in the validation of ASIC implementations in Verilog/SystemVerilog</li><li>Run formal verification of complex blocks to ensure functional correctness</li><li>Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM, SystemC and DPI-C</li><li>Develop a highly automated environment to run regressions that can be used to make builds and maintain organization of the database</li></ul><br>
Export Control Requirement:<br>
Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.</div><h2 class="jobSectionHeader"><b><br>
BASIC QUALIFICATIONS</b></h2><ul><li>Bachelor's degree in Electrical or Communications Engineering or a related field</li><li>7+ years of verification, preferably in communication systems experience</li><li>3+ years of UVM, C, System C, and scripting experience</li></ul><h2 class="jobSectionHeader"><b>
PREFERRED QUALIFICATIONS</b></h2><ul><li>Master's degree or Ph.D. degree in Electrical Engineering or related field</li><li>10+ years in digital verification, preferably in communication systems</li><li>Familiarity with Matlab</li><li>Modem design verification experience</li><li>System C or Matlab model : development or DV integration experience</li><li>Familiarity with formal verification techniques</li><li>Strong written and verbal skills</li></ul><br>
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.<br>
<br>
Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company&rsquo;s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.<br>
<br>
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you&rsquo;re applying in isn&rsquo;t listed, please contact your Recruiting Partner.<p><br>
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life &amp; AD&amp;D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.</p><br>
USA, CA, San Diego - 159,200.00 - 215,300.00 USD annually<br>
USA, CA, Sunnyvale - 183,000.00 - 247,600.00 USD annually<br>
USA, TX, Austin - 159,200.00 - 215,300.00 USD annually<br>
USA, WA, Redmond - 159,200.00 - 215,300.00 USD annually</div><p></p>

Sr. ASIC Design Verification Engineer, Amazon Leo

Qualcomm

<div><h2 class="jobSectionHeader"><b>Company:
</b></h2>Qualcomm Technologies, Inc.
<p></p><h2 class="jobSectionHeader"><b>Job Area:
</b></h2>Engineering Group, Engineering Group &gt; ASICS Engineering
<p></p><p><b>General Summary:
</b></p><div>As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.
</div><div></div><div>Qualcomm, the world's second largest fabless semiconductor company and the world leader in wireless ICs powering the majority of 5G devices. Qualcomm is expending and entering new area such as the PC and the Data Center markets.
</div><div></div><div>Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills. Besides solid ASIC and/or FPGA design experience, this professional need to be a great team player with good communication skill.
</div><div></div><div>This is a great opportunity to join a fast-paced SoC team responsible for RTL Design, flows and methodology for high performance ASICs in the latest process nodes for High Performance Compute and for AI spaces.
</div><div></div><div>With new projects are coming up, it is a wonderful timing to join our team and take part in innovation and in creating new architectures for new technologies.
</div><div></div><div><b>An ideal candidate will be capable of:
</b></div><div></div><ul><li>Proven knowledge in the Server/ Data Center IPs, protocols, and interfaces
</li><li>Experience in designing arithmetic/computational/machine learning IPs
</li><li>Great understanding of design techniques for speed and for power efficiency
</li><li>Oversee definition, design, verification, and documentation for ASIC development for a variety of products
</li><li>Determine architecture design, logic design, large-scale design integration and system simulation
</li><li>Experience in developing tools and scripting for process automation is an advantage
</li></ul><div></div><div><b>Principal Duties &amp; Responsibilities:
</b></div><div></div><ul><li>Hands-on: Uses tools/applications to execute the architecture and design of SOC according to design protocol provided
</li><li>Problem-solver: Resolves architecture, design, or verification problems by applying sound ASIC engineering practices with minimal supervision
</li><li>Design expert: Executes the design and verification strategies according to ASICs, SoC, and IP cores specifications and in alignment with project lead
</li><li>Analytical skills: Participate and actively contribute on design and architecture reviews, demonstrate analytical skills
</li><li>Innovative: Identify areas for flow and process improvements through design techniques and through automations
</li><li>Communication: well communicate within the team and with peer teams, good presentation skills
</li><li>Team player: regularly collaborate and share-knowledge with other team members to achieve a common goal, step-up in critical times
</li><li>Feedback: Feedback Silicon learnings to process team, design methodology, IP and SoC design
</li></ul><div></div><div><b>Preferred </b><b>Qualifications:
</b></div><div></div><ul><li>Master's degree in Electrical Engineering, Computer Science, or Computer Engineering
</li><li>5+ years of relevant experience in ASIC design, scripting and architecture
</li><li>Experience in designing arithmetic/computational/machine learning IPs
</li></ul><p></p><p><b>Minimum Qualifications:
</b></p><ul><li>Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
</li></ul>OR
<br>
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
<br>
OR
<br>
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
<p></p><div><p>Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
</p></div><p></p><p><b>To all Staffing and Recruiting Agencies </b>: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
</p><p><b>EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
</b></p><p></p><p>Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.<br>
</p><p></p><p><b>Pay range </b><b>and Other Compensation &amp; Benefits </b><b>:
</b></p>$140,000.00 - $210,000.00
<p></p><p>The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer &ndash; and you can review more details about our US benefits at this link .
</p><p></p><p>If you would like more information about this role, please contact Qualcomm Careers .</p></div>

VLSI Design Engineer for Server / Data Center Products

NVIDIA

<div><div><div>We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual computing, the art and science of computer graphics. With our invention of the GPU - the engine of modern visual computing - the field has grown to encompass video games, movie production, product design, medical diagnosis, and scientific research.</div></div><div></div><div><div><div><div><div><div><div><div><div><div>
Today, we stand at the beginning of the next era, the AI computing era, ignited by a new computing model, GPU deep learning. This new model - where deep neural networks are trained to recognize patterns from meaningful amounts of data - has shown to be deeply effective at solving the most sophisticated problems in everyday life. As a ASIC Verification Engineer at NVIDIA, you will verify the design and implementation of our innovative high speed coherent interconnects for our mobile SoCs and GPUs. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. To learn more about NVIDIA's ultra-fast chip interconnect technology visit: <div>https://www.nvidia.com/en-us/data-center/nvlink-c2c/</div></div><div></div><div>
What you'll be doing:</div><ul><li><div>
In this position, you will be responsible for verification of high-speed coherent interconnect design, architecture and golden models.</div></li><li><div>
You will be responsible for micro-architecture using sophisticated verification methodologies.</div></li><li><div>
As a member of our verification team, you'll understand the design &amp; implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), complete test/coverage plans, and verify the correctness of the design. This role will collaborate with architects, designers, emulation, and silicon verification teams to accomplish your tasks.</div></li></ul><div></div><div>
What we need to see:</div><ul><li><div>
Bachelors or Master&rsquo;s Degree (or equivalent experience)</div></li><li><div>
8+ years of relevant verification experience.</div></li><li><div>
Experience in architecting test bench environments for unit level verification.</div></li><li><div>
Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies.</div></li><li><div>
Prior Design or Verification experience of Coherent high-speed interconnects.</div></li><li><div>
Knowledge of industry standard interconnect protocols like PCIE, CXL, CHI will be useful.</div></li><li><div>
Strong background developing TB's from scratch using SV and UVM methodology is desired.</div></li><li><div>
C++ programming language experience, scripting ability and an expertise in System Verilog.</div></li><li><div>
Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).</div></li><li><div>
Strong debugging and analytical skills.</div></li><li><div>
Experienced communication and interpersonal skills are required. A history of mentoring junior engineers and interns a huge plus.</div></li></ul><div></div><div>
NVIDIA is widely considered to be one of the technology world&rsquo;s most desirable employers! We have some of the most forward-thinking and dedicated people in the world working for us. If you're creative and autonomous, we want to hear from you.</div><div></div><div>
#LI-Hybrid</div></div></div></div></div></div></div></div></div></div><div></div>
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 196,000 USD - 310,500 USD.<div></div><div><div><div><div><div><div><div><div>
You will also be eligible for equity and <div>benefits</div>.</div></div></div></div></div></div></div></div><div></div>
Applications for this job will be accepted at least until March 23, 2026.<div></div><div>
This posting is for an existing vacancy.</div><div>
NVIDIA uses AI tools in its recruiting processes.</div><div></div>
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.</div><div></div>

Senior ASIC Verification Engineer, Coherent High Speed Interconnect

Renesas

<div><div><p><b>Job Description</b></p><br>
<ul><li>
Work with interdisciplinary teams throughout the organization, as well as industry partners and standards organizations, to create specifications for a wide variety of mixed-signal integrated circuits.</li><li>
Review proposals from standards organizations like JEDEC and collaborate with internal teams to identify issues and align on a stance.</li><li>
Prepare and present presentations to clearly communicate Renesas&rsquo;s position for external audiences.</li><li>
Prepare and present proposals from Renesas to standards organizations to recommend new device definitions or changes to existing industry standards.</li><li>
Create and maintain internal specification documents.</li><li>
Work closely with technical writers to generate documents and review output to ensure accuracy.</li><li>
Participate in meetings of standards organizations like JEDEC, representing and advocating for Renesas.</li></ul><p><b><br>
Qualifications</b></p><br>
<ul><li>
Experience with architecting mixed-signal designs and writing device-level or sub-system specifications</li><li>
Fluency in ASIC design methodology, both analog and digital</li><li>
Experience in the DRAM Memory industry</li><li>
10+ years of direct experience in ASIC/IC design/architecture.</li><li>
Excellent oral and written communications skills</li><li>
Experience working in or with JEDEC</li><li>
Public speaking experience</li><li>
Experience with Adobe FrameMaker and Visio/Illustrator</li><li>
Masters in Electrical Engineering, Computer Engineering, Computer Science, or equivalent with 10+ years of experience</li><li>
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent with 15+ years of experience</li></ul><p><b><br>
Company Description</b></p><p><br>
Seeking an experienced mixed-signal IC product definition engineer to work with the Renesas Memory Interface Architecture team to create specifications for cutting edge integrated circuits. This is a position with a lot of growth potential and an opportunity to drive the direction of the industry.</p><p><b><br>
Additional Information</b></p><div></div><p><br>
Renesas is an embedded semiconductor solution provider driven by its Purpose &lsquo;<b>To Make Our Lives Easier</b>.&rsquo; As the industry&rsquo;s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog &amp; Connectivity, and Power.<br>
<br>
With a diverse team of over 22,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, &lsquo;<b>To Make Our Lives Easier</b>.&rsquo;<br>
<br>
At Renesas, you can:</p><ul><li><b>
Launch and advance your career </b>in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things.</li></ul><ul><li><b>
Make a real impact </b>by developing innovative products and solutions to meet our global customers' evolving needs and help make people&rsquo;s lives easier, safe and secure.</li></ul><ul><li><b>
Maximize your performance and wellbeing</b> in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day.</li></ul><p>
Are you ready to own your success and make your mark?</p><p>
Join Renesas. <b>Shape Your Future with Us</b>.</p><p>
Renesas Electronics is an equal opportunity and affirmative action employer, committed to celebrating diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by federal, state or local law. For more information, please read our <b>Diversity &amp; Inclusion Statement</b>.</p><p>
Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.</p><p>
We have adopted a hybrid model that gives employees the ability to work remotely two days a week while ensuring that we come together as a team in the office the rest of the time. The designated in-office days are Tuesday through Thursday for innovation, collaboration and continuous learning.</p></div></div>
<br><div><div><div><div><div><b>Job title</b></div><div>
Senior Staff Product Definer
</div></div></div><div><div><ul><li><div><b>Department
</b></div>Manufacturing
</li></ul><ul><li><div><b>Location
</b></div>Duluth
</li></ul><ul><li><div><b>Remote
</b></div>No
</li></ul></div></div><div><div><div><b>Requisition ID
</b></div><div>20025637_2026-03-16</div></div></div></div></div><p></p>

Senior Staff Product Definer

Micron Technology

<div><p><b>Our vision is to transform how the world uses information to enrich life for </b><b><i>all</i></b><b>.
</b></p><p>Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.</p><p></p><p>
As a Principal HBM RTL Designer, you will serve as a technical leader driving the front‑end digital design of next‑generation High Bandwidth Memory (HBM) products. This role requires deep expertise in RTL architecture, build methodology, and multi-functional technical leadership. You will own complex design blocks end‑to‑end&mdash;from architectural definition through production‑quality implementation&mdash;while mentoring engineers, influencing design strategy, and ensuring world‑class design execution.</p><p></p><h2 class="jobSectionHeader"><b>
Responsibilities:</b></h2><ul><li>
Define, architect, and lead the development of advanced RTL blocks for HBM subsystems, ensuring alignment with product requirements and architectural goals.</li><li>
Own end‑to‑end front‑end design, including micro‑architecture, RTL development, simulation strategy, and design quality.</li><li>
Drive technical decisions across circuit development, synthesis, constraints, and physical‑design integration, ensuring timing, power, and area compliance.</li><li>
Champion design methodologies, develop reusable frameworks, and improve RTL design flows, validation strategies, and sign‑off processes.</li><li>
Collaborate closely with physical design, verification, architecture, and product engineering to integrate subsystems and deliver high‑quality silicon.</li><li>
Lead root‑cause analysis and corrective actions for complex design issues, ensuring long‑term design robustness.</li><li>
Communicate effectively at all levels, contributing to technical planning, project execution, and cross‑organizational alignment.</li></ul><p></p><h2 class="jobSectionHeader"><b>
Minimum Qualifications:</b></h2><ul><li>
Bachelor&rsquo;s degree with 9+ years of proven experience, or Master&rsquo;s degree with 7+ years of proven experience in digital development and RTL development.</li><li>
Expert-level knowledge of front-end digital design, RTL coding, micro-architecture, and system integration.</li><li>
Deep understanding of timing closure, power optimization, area trade-offs, and system-level complexity management.</li><li>
Strong experience with synthesis, STA, constraints, LEC, Lint, CDC, and front-end sign-off methodologies.</li><li>
Proven ability to lead technical teams, mentor engineers, and influence build direction across large programs.</li><li>
Exceptional problem-solving, analytical, communication, and technical leadership skills.</li></ul><p></p><h2 class="jobSectionHeader"><b>
Preferred Qualifications:</b></h2><ul><li>
Experience with UPF, power-intent development, power analysis, DFT/scan insertion, ATPG, and timing model generation.</li><li>
Proficiency in Python, Perl, or scripting to automate and improve design flows.</li><li>
Familiarity with sophisticated place-and-route tools and back-end requirements for successful RTL-to-GDS integration.</li><li>
Proven history delivering high-complexity systems, preferably in memory, high-speed I/O, or compute-intensive ASIC builds.</li><li>
Ability to define architectural trade-offs, influence product direction, and guide teams toward scalable and maintainable build solutions.</li></ul><p></p><p>
As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.</p><p></p><p>
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.</p><p></p><p><br>
To learn more about Micron, please visit<b> </b><b>micron.com/careers</b></p><p></p><p>
For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron&rsquo;s People Organization at hrsupport_na@micron.com or 1-800-336-8918 (select option #3)</p><p></p><p>
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.</p><p></p><p>
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.</p><p></p><p>
AI alert<b>:</b> Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
</p><p></p><p>Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.</p></div><p></p>

Principal Digital Designer, HIG HBM

Amazon Web Services

<div><h2 class="jobSectionHeader"><b>DESCRIPTION</b></h2><div>
Annapurna Labs (our organization within AWS) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago&mdash;even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.<br>
<br>
We are seeking a Senior SI/PI Engineer (Signal Integrity and Power Integrity) who will play a key role in the definition, design and validation of AWS next generation machine learning ASICs. As a senior member of our hardware team, you will have a meaningful opportunity to participate in the design and execution of all SI related topics, with the goal of creating and customized platforms that fit within AWS datacenter&rsquo;s world leading technology.<br>
<br>
Candidates will be successful in this role with these skills:<br>
<ul><li>Strong communication and teamwork skills, with the ability to interact effectively with cross-functional teams.</li><li>Decisive, yet collaborative, approach, balancing technical constraints with business and manufacturing considerations.</li><li>Problem-solving mindset, able to troubleshoot and resolve SI/PI-related challenges efficiently.</li></ul><br>
Key job responsibilities<br>
<ul><li>Perform end-to-end high-speed channel simulations to ensure signal integrity across complex designs.</li><li>Conduct SI/PI analysis to optimize advanced package, minimizing losses and signal degradation.</li><li>Utilize simulation tools such as ADS, MATLAB, Cadence, HFSS, and others to evaluate performance and troubleshoot issues.</li><li>Work with PCIe protocols and equalization techniques (DFE, CTLE, FFE) to optimize high-speed interfaces.</li><li>Analyze clock distribution and jitter, ensuring signal timing and integrity across designs.</li><li>Collaborate with advanced package and hardware design teams to define optimal stack-ups and trade-offs for manufacturing feasibility and performance.</li><li>Identify and mitigate advanced packaging manufacturing issues, ensuring high production yield and reliability.</li><li>Work closely with cross-functional teams, including hardware design, validation, and product engineering, to align on requirements and trade-offs.</li></ul><br>
About the team<br>
Our team is dedicated to supporting new members. We have a broad mix of experience levels and tenures, and we&rsquo;re building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind, code reviews. We care about your career growth and strive to assign projects that help our team members develop your engineering expertise so you feel empowered to take on more complex tasks in the future.<br>
<br>
Diverse Experiences<br>
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn&rsquo;t followed a traditional path, or includes alternative experiences, don&rsquo;t let it stop you from applying.<br>
<br>
About AWS<br>
Amazon Web Services (AWS) is the world&rsquo;s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating &mdash; that&rsquo;s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.<br>
<br>
Inclusive Team Culture<br>
Here at AWS, it&rsquo;s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness.<br>
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Work/Life Balance<br>
We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there&rsquo;s nothing we can&rsquo;t achieve in the cloud.<br>
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Mentorship &amp; Career Growth<br>
We&rsquo;re continuously raising our performance bar as we strive to become Earth&rsquo;s Best Employer. That&rsquo;s why you&rsquo;ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.</div><h2 class="jobSectionHeader"><b>
BASIC QUALIFICATIONS</b></h2><ul><li>Deep understanding of SI concepts and strong analytical skills in signal and power integrity.</li><li>Hands-on experience with simulation tools such as ADS, MATLAB, Cadence, HFSS, and others.</li><li>Proficiency in high-speed channel simulations, including system-level modeling and validation.</li><li>Experience with PCIe protocols and equalization methods (DFE, CTLE, FFE).</li><li>Knowledge of clock distribution and jitter analysis for high-speed designs.</li><li>Expertise in advanced package and board manufacturing processes, including identifying and mitigating potential issues.</li><li>Hands-on experience in stack-up design, including dielectric material selection, impedance control, and layer optimization.</li></ul><h2 class="jobSectionHeader"><b>
PREFERRED QUALIFICATIONS</b></h2><ul><li>Experience in power integrity analysis and power delivery network (PDN) optimization.</li><li>Familiarity with high-speed design compliance testing and validation methodologies.</li><li>Knowledge of EMC/EMI mitigation techniques.</li></ul><br>
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.<br>
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Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company&rsquo;s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.<br>
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Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you&rsquo;re applying in isn&rsquo;t listed, please contact your Recruiting Partner.<p><br>
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life &amp; AD&amp;D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.</p><br>
USA, CA, Cupertino - 183,000.00 - 247,600.00 USD annually<br>
USA, TX, Austin - 159,200.00 - 215,300.00 USD annually</div><p></p>

Sr. Signal Integrity / Power Integrity Engineer, Annapurna Labs, ML Packaging

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