asic engineer

Apple

<div>Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Sophisticated, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next excellent Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our complex group, you will get the outstanding and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple&rsquo;s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a dedicated engineer to join our exciting team of problem solvers. 
 
Description 
 
As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: 
 
<ul><li>Write microarchitecture and/or design specifications</li></ul> 
<ul><li>Design, implement, and debug complex logic designs</li></ul> 
<ul><li>Integrate complex IPs into the SOC</li></ul> 
<ul><li>Support all front end integration activities like Lint, CDC, Synthesis, and ECO</li></ul> 
<ul><li>Work with other specialists that are members of the SOC Design, SOC Design</li></ul> 
<ul><li>Verification, Emulation, STA, and Physical Design teams</li></ul> 
<ul><li>Collaborate with software and systems teams to ensure a high quality</li></ul> 

Preferred Qualifications 
 
Experience writing specifications and converting them to design. 
 
Experience with multiple clock domains and asynchronous interfaces. 
 
Hands on experience in all aspects of the chip development process with proficiency in front end tools and methodologies 
 
Experience or knowledge of system architecture, CPU &amp; IP Integration, and power and clock management designs desirable. 
 
Ability to communicate optimally across all internal groups 
 
Familiarity with software and operating concepts a plus 
 
Familiarity with scripting languages like Perl, Python, or TCL a plus 
 
Minimum Qualifications 
 
BS and a minimum of 3 years relevant industry experience. 
 
Verilog RTL Logic Design experience. 
 
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .</div>

ASIC Design Engineer

Apple is building the world&rsquo;s fastest highly parallel mobile processing systems. Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation. As we increase levels of parallelism, bandwidth and capacity, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency, and high-bandwidth. In this role, you will work on crafting special purpose cache and controller which is part and parcel of the SOC memory hierarchy. 
 
Description 
 
Design and develop hardware for cache subsystem in high performance system on a chip (SoC). 
 
Develop cache micro-architecture based on architecture guidelines and model analysis. 
 
Explore architecture trade-offs in system performance, area, and power consumption. 
 
Develop and debug register-transfer level (RTL) design of various sections in the cache subsystem. 
 
Work on front-end netlist and area/timing analysis of the cache subsystem. 
 
Work with physical design team on the timing closure of the cache subsystem. 
 
Preferred Qualifications 
 
Knowledge of high-performance coherent memory systems or interconnect architectures 
 
Knowledge of high-performance DRAM controller 
 
M.S in a relevant field. 
 
Minimum Qualifications 
 
10 + years of full time ASIC design experience 
 
memory system development 
 
RTL/micro-architecture definition 
 
PPA (performance/power/area) analysis 
 
Cache design background including an understanding of different memory organizations and tradeoffs. 
 
Hands on Experience with multi-processor cache coherence protocols 
 
B.S. in a relevant field 
 
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant . 
 
Pay &amp; Benefits 
 
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $181,100 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location. 
 
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. 
 
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

ASIC Design Engineer - Cache Controller

Apple&rsquo;s Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer to join our dynamic group. In this role, you will develop custom SoCs that drive the performance and efficiency of Apple&rsquo;s products. You will work on cutting-edge technologies and collaborate with cross-functional teams to deliver groundbreaking solutions. 
 
Description 
 
Design and Development: Design, implementation, and verification of complex ASICs. Develop RTL using SystemVerilog and perform synthesis. 
 
Verification: Engage with simulation-based and formal verification teams to ensure robust design validation. 
 
Integration and Testing: Collaborate with hardware and software teams to integrate digital designs into complex SoCs. 
 
Timing and Power Analysis: Conduct timing analysis and power optimization to achieve PPA goals. 
 
Documentation and Reporting: Create detailed micro-architecture and design documentation. 
 
Preferred Qualifications 
 
Educational Background: Bachelor&rsquo;s or Master&rsquo;s degree in Electrical Engineering, Computer Engineering, or a related field. 
 
Experience: 3+ years of proven experience in ASIC design, including RTL design and verification. Hands-on experience with ASIC design tools and methodologies is essential. 
 
Technical Skills: Proficiency in SystemVerilog, RTL design, synthesis, and timing analysis. 
 
Problem-Solving: Strong analytical and problem-solving skills. 
 
Collaboration: Excellent communication and teamwork skills, work effectively in cross-functional teams. 
 
Attention to Detail: Meticulous attention to detail and a commitment to delivering high-quality designs. 
 
Experience with high-speed I/O design and protocols. Knowledge of PCIe is a plus. 
 
Familiarity with custom ASIC design and FPGA prototyping. 
 
Hands on experience in all aspects of front-end chip development process (e.g., CDC/RDC, LINT, LEC, etc.). 
 
Knowledge of low-power design techniques and power optimization strategies. 
 
Minimum Qualifications 
 
Minimum of BS + 3 years relevant industry experience 
 
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

ASIC Design and Integration Engineer

Imagine what you could do here at Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our dynamic group, you will get the unrivaled and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple&rsquo;s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a hardworking engineer to join our exciting team of problem solvers. 
 
Come join our team and be responsible for leading edge IP development and coordinating with multiple SOC teams. In this role, you will work collaboratively with various SOC teams to execute design and integration tasks for the high quality IP deliverables. 
 
Description 
 
As an ASIC STA Engineer, you will have responsibilities spanning various aspects of SOC design: Full chip and block level timing closure ownership throughout the entire project. Develop and maintain methodology and flows related to timing verification and closure. Generation of block and full chip timing constraints. Work on Apple SoC (System-on-Silicon) chips in deep sub-micron technologies targeted for high end mobile applications. Work closely with various multi-functional teams on resolving complex timing issues for major building blocks of complex SoCs. 
 
Preferred Qualifications 
 
Strong fundamentals in the area of Digital design 
 
Self-starter and highly motivated 
 
Proficient in scripting languages (TCL and Perl) 
 
Familiarity with ASIC design timing concepts 
 
Exposure in STA tools (Primetime) is a plus 
 
Familiarity with front end tools and methodologies such as Synthesis, Logic equivalence checks 
 
Familiarity in Constraint analysis and debug, using industry standard tools such as Synopsys GCA (Galaxy Constraint Analyzer) is desirable but not required 
 
Knowledge of timing corners/modes, process variations and signal integrity related issues is a plus 
 
Ability to commnicate optimally across all internal groups 
 
Minimum Qualifications 
 
Bachelors Degree + 3 Years of Experience. 
 
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant . 
 
Pay &amp; Benefits 
 
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location. 
 
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. 
 
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

STA Engineer

Collins Aerospace

<div>Date Posted:
2026-02-12
Country:
United States of America
Location:
US-IA-CEDAR RAPIDS-166 ~ 855 35Th St NE ~ BLDG 166
Position Role Type:
Onsite
U.S. Citizen, U.S. Person, or Immigration Status Requirements:
The ability to obtain and maintain a U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance
Security Clearance Type:
DoD Clearance: Secret
Security Clearance Status:
Active and existing security clearance required after day 1
Joining Collins Aerospace isn&rsquo;t just about finding a job; it&rsquo;s about embarking on a journey to redefine the future of aerospace technology.
Collins Aerospace, an RTX company, is a leader in technologically advanced and intelligent solutions for the global aerospace and defense industry. Collins Aerospace has the capabilities, comprehensive portfolio, and expertise to solve customers&rsquo; toughest challenges and to meet the demands of a rapidly evolving global market.
We are looking for a Senior FPGA Engineer to be involved in the design, implementation, verification, and integration of a wide variety of high-performance digital ASICs, FPGAs, and circuit boards applied to computer graphics and supporting communication signal processing and information assurance products.
What You Will Do:<ul><li>
Identify requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration.</li><li>
Recommend new tools and practices for continuous improvement in the group&rsquo;s ASIC / FPGA design flow.</li><li>
Contribute to engineering estimates for new program pursuits.</li><li>
Provide technical leadership for project design teams by breaking down work, planning activities, and reporting status.</li></ul>
Qualifications You Must Have:<ul><li>
Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience.</li><li>
Experience in RTL coding and simulation in Verilog or VHDL.</li><li>
Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure.</li><li>
Experience in Testbench development for the verification of RTL blocks using System Verilog.</li><li>
Proficient using ASIC and/or FPGA simulation and synthesis tools (e.g., ModelSim, Synplify, Quartus, Vivado, or other FPGA-specific tools).</li><li>
Familiarity with revision control concepts and tools (e.g., Git, Subversion).</li></ul>
Qualifications We Prefer:<ul><li>
Familiarity with best-practice chip-level verification techniques and languages (e.g., constrained random, functional coverage, System Verilog).</li><li>
Experience in ASIC / FPGA lab validation using advanced laboratory equipment.</li><li>
Experience in Design for Test (DFT) and manufacturability experience.</li><li>
Experience with Unix, scripting, C/C++, and/or Perl.</li></ul>
Do you want to be a part of something bigger? A team whose impact stretches across the world, and even beyond? At Collins Aerospace, our Mission Systems team helps civilian, military and government customers complete their most complex missions &mdash; whatever and wherever they may be. Our customers depend on us for intelligent and secure communications, missionized systems for specialized aircraft and spacecraft and collaborative space solutions. By joining our team, you&rsquo;ll have your own critical part to play in ensuring our customer succeeds today while anticipating their needs for tomorrow. Are you up for the challenge? Join our mission today.
What We Offer:
Some of our competitive benefits package includes:
<ul><li>Medical, dental, and vision insurance
</li><li>Three weeks of vacation for newly hired employees
</li><li>Generous 401(k) plan that includes employer matching funds and separate employer retirement contribution, including a Lifetime Income Strategy option
</li><li>Tuition reimbursement program</li><li>
Student Loan Repayment Program
</li><li>Life insurance and disability coverage
</li><li>Optional coverages you can buy pet insurance, home and auto insurance, additional life and accident insurance, critical illness insurance, group legal, ID theft protection</li><li>
Birth, adoption, parental leave benefits</li><li>
Ovia Health, fertility, and family planning
</li><li>Adoption Assistance
</li><li>Autism Benefit
</li><li>Employee Assistance Plan, including up to 10 free counseling sessions
</li><li>Healthy You Incentives, wellness rewards program</li><li>
Doctor on Demand, virtual doctor visits
</li><li>Bright Horizons, child and elder care services</li><li>
Teladoc Medical Experts, second opinion program
</li><li>Eligible for relocation assistance</li><li>
And more!</li></ul>
Learn More &amp; Apply Now!<ul><li>Please ensure the role type (defined below) is appropriate for your needs before applying to this role.</li></ul>
Onsite: Employees who are working in Onsite roles will work primarily onsite. This includes all production and maintenance employees, as they are essential to the development of our products.
At Collins, the paths we pave together lead to limitless possibility. And the bonds we form &ndash; with our customers and with each other - propel us all higher, again and again. 
Apply now and be part of the team that&rsquo;s redefining aerospace, every day.
As part of our commitment to maintaining a secure hiring process, candidates may be asked to attend select steps of the interview process in-person at one of our office locations, regardless of whether the role is designated as on-site, hybrid or remote.
The salary range for this role is 86,800 USD - 165,200 USD. The salary range provided is a good faith estimate representative of all experience levels. RTX considers several factors when extending an offer, including but not limited to, the role, function and associated responsibilities, a candidate&rsquo;s work experience, location, education/training, and key skills.
Hired applicants may be eligible for benefits, including but not limited to, medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, Employee Scholar Program, parental leave, paid time off, and holidays. Specific benefits are dependent upon the specific business unit as well as whether or not the position is covered by a collective-bargaining agreement.
Hired applicants may be eligible for annual short-term and/or long-term incentive compensation programs depending on the level of the position and whether or not it is covered by a collective-bargaining agreement. Payments under these annual programs are not guaranteed and are dependent upon a variety of factors including, but not limited to, individual performance, business unit performance, and/or the company&rsquo;s performance.
This role is a U.S.-based role. If the successful candidate resides in a U.S. territory, the appropriate pay structure and benefits will apply.
RTX anticipates the application window closing approximately 40 days from the date the notice was posted. However, factors such as candidate flow and business necessity may require RTX to shorten or extend the application window.
RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified Individuals with a Disability and Protected Veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans&rsquo; Readjustment Assistance Act.
Privacy Policy and Terms:
Click on this link to read the Policy and Terms</div>

Senior FPGA Engineer (Onsite)

<div>Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Sophisticated, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next excellent Apple product. 
 
Do you enjoy working on challenges that no one has solved yet? As a member of our complex group, you will get the outstanding and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple&rsquo;s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a dedicated engineer to join our exciting team of problem solvers. 
 
Description 
 
The ideal candidate will have experience in ASIC design with: 
 
<ul><li>IP Integration: Integrate third-party or internal IP blocks (e.g., CPU, GPU, memory controllers, custom logic) into a SoC.</li></ul> 
<ul><li>RTL Integration: Manage and merge RTL codebases, ensure connectivity and bus/interface protocols (e.g., AMBA, AXI, AHB) are correctly implemented.</li></ul> 
<ul><li>Top-Level Assembly: Create and maintain top-level SoC RTL, wrappers, and interconnects.</li></ul> 
<ul><li>Linting and Synthesis: Run and debug lint, CDC/RDC, and logic synthesis to ensure design quality.</li></ul> 
<ul><li>Build and Test Infrastructure: Develop and maintain automated build and regression systems for integration.</li></ul> 
<ul><li>Design Constraints: Define and validate synthesis and timing constraints (SDC files).</li></ul> 
<ul><li>Timing Closure: Work closely with physical design and STA teams to achieve timing closure at top level.</li></ul> 
<ul><li>Functional Verification Support: Provide integration-level support to design verification teams, including simulation bring-up and debug.</li></ul> 
<ul><li>Documentation and Reviews: Create and maintain design documents and participate in design reviews.</li></ul> 

Preferred Qualifications 
 
Solid understanding of digital logic design and RTL development (SystemVerilog, Verilog). 
 
Familiarity with SoC design flows and tools (e.g., Synopsys, Cadence). 
 
Experience with bus protocols (AXI, AHB, APB) and interface standards (PCIe, USB, DDR). 
 
Knowledge of ASIC tool flows: lint, synthesis, CDC, DFT, STA. 
 
Strong scripting skills (Python, Perl, TCL, Shell) for automation. 
 
Good debugging and problem-solving skills. 
 
Excellent communication and cross-functional collaboration. 
 
Minimum Qualifications 
 
Bachelor's Degree with +0 Years of Experience 
 
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant . 
 
Pay &amp; Benefits 
 
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $126,800 and $190,900, and your base pay will depend on your skills, qualifications, experience, and location. 
 
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. 
 
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.</div>

Integration Engineer

Amazon Web Services

<div><h2 class="jobSectionHeader">DESCRIPTION</h2><div>
Our Machine Learning Acceleration (MLA) team designs and develops the SOCs that power today's AI workloads across datacenters worldwide. As an ASIC Design Methodologies and Infrastructure Engineer, you'll play a foundational role in the project by automating design flows and building large-scale solutions that accelerate silicon development and we're just getting started here at Amazon! 
 
We're looking for a strong engineer who is passionate about creating design flows and automation flows that enhance both the productivity and quality of our design team. The ideal candidate brings proven expertise in RTL design and front-end methodologies while having good software skills and a drive for improving and automating flows. In this role, you'll collaborate closely with architects, designers, verification engineers, and other cross-functional team members to refine existing design flows and introduce innovative automation solutions that streamline flows and elevate overall design quality. 
Key job responsibilities 
 
Core Responsibilities: 
 
<ul><li>Develop and implement new methodologies and infrastructure to empower design teams to operate efficiently while maintaining high-quality standards.</li><li>Enhance and build design flows to boost the overall productivity of design teams.</li><li>Collaborate with vendors to evaluate and qualify new design tools and updated tool versions.</li></ul> 
About the team 
Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago&mdash;even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help
 
 
Diverse Experiences 
Annapurna values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn&rsquo;t followed a traditional path, or includes alternative experiences, don&rsquo;t let it stop you from applying. 
 
Work/Life Balance 
We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there&rsquo;s nothing we can&rsquo;t achieve in the cloud. 
 
Inclusive Team Culture 
Here at Annapurna, it&rsquo;s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon conferences, inspire us to never stop embracing our uniqueness. 
 
Mentorship &amp; Career Growth 
We&rsquo;re continuously raising our performance bar as we strive to become Earth&rsquo;s Best Employer. That&rsquo;s why you&rsquo;ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.
</div><h2 class="jobSectionHeader">BASIC QUALIFICATIONS</h2><ul><li>7+ years of ASIC implementation, synthesis, STA and physical design in deep sub-micron nodes (16nm or smaller) experience</li><li>7+ years of digital design in communication systems experience</li><li>7+ years of full-custom analog or RF layout experience</li><li>7+ years of wireless communications systems and implementation experience</li><li>8+ years of creating and maintaining automation frameworks for Post-Silicon Flow experience</li><li>7+ years of verification in communication systems experience</li><li>5+ years of UVM, C, System C, and scripting experience</li></ul><h2 class="jobSectionHeader">
PREFERRED QUALIFICATIONS</h2><ul><li>Master's degree or Ph.D. degree in Electrical Engineering or related field</li><li>Experience in RTL coding and debug, as well as performance, power, area analysis and trade-offs</li><li>Experience with modern ASIC/FPGA design and verification tools</li><li>Experience with SOC bring-up and post-silicon validation</li></ul> 
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. 
 
Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company&rsquo;s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. 
 
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you&rsquo;re applying in isn&rsquo;t listed, please contact your Recruiting Partner. 
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life &amp; AD&amp;D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits. 
USA, CA, Cupertino - 183,000.00 - 247,600.00 USD annually 
USA, TX, Austin - 159,200.00 - 215,300.00 USD annually</div>

Senior ASIC Design Infrastructure & Methodologies engineer, MLA-MI - Annapurna Labs

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