design verification engineer

NVIDIA

<div><div>We're now looking for a Senior Digital Design Verification Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI &mdash; the next era of computing. NVIDIA is a &ldquo;learning machine&rdquo; that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life&rsquo;s work, to amplify human imagination and intelligence. Make the choice to join our diverse team today!</div><div></div><div>
As a Senior Digital Design Verification Engineer at NVIDIA, you'll verify the design and implementation of our cutting edge SerDes IPs. This ground breaking technology will enable and accelerate gaming, artificial intelligence, deep learning, and autonomous driving. We have put together a best-in-class team that delivers IPs that will be consumed by standard as well as industry-leading proprietary high-speed protocols!</div><div></div><div>
What you&rsquo;ll be doing:</div><ul><li><div>
Verification of the digital design, golden models and micro-architecture of the SerDes IPs using advanced verification methodologies such as UVM.</div></li><li><div>
Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.</div></li><li><div>
Responsible for understanding the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design.</div></li><li><div>
Write and implement test plan and thoroughly verify a design in a product shipment focused / compressed schedule.</div></li><li><div>
Work with architects, designers, and pre and post silicon verification teams to accomplish your tasks.</div></li></ul><div></div><div>
What we need to see:</div><ul><li><div>
Bachelors or Masters Degree (or equivalent experience) in Electrical Engineering, Computer Science, or Computer Engineering</div></li><li><div>
At least 5 years of validated experience.</div></li><li><div>
Background in verification at Unit/Sub-system/SOC level and expertise in SystemVerilog a must.</div></li><li><div>
Experience using random stimulus along with functional coverage and assertion-based verification methodologies a must.</div></li><li><div>
Experience in verification methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug.</div></li></ul><div></div><div>
Ways to stand out from the crowd:</div><ul><li><div>
Expertise in bus or interconnect protocols (e.g. PCI Express, USB, SATA) a huge plus.</div></li><li><div>
Experience in verifying complex SerDes system, understanding mixed-signal designs, and have experience in modeling of analog circuits a huge plus.</div></li><li><div>
Perl, Python, C/C++ programming language experience.</div></li><li><div>
Good debugging and analytical skills.</div></li><li><div>
Good interpersonal skills &amp; dream to work as a phenomenal teammate.</div></li></ul><div></div>
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.<div></div><div><div><div><div><div><div><div><div>
You will also be eligible for equity and <div>benefits</div>.</div></div></div></div></div></div></div></div><div></div>
Applications for this job will be accepted at least until February 27, 2026.<div></div><div>
This posting is for an existing vacancy.</div><div>
NVIDIA uses AI tools in its recruiting processes.</div><div></div>
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.</div><div></div>

Senior Digital Design Verification Engineer - Hardware

Astera Labs

<div><div><p>Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL&reg;, Ethernet, NVLink, PCIe&reg;, and UALink&trade; semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.</p></div><p>
Astera Labs is seeking a <b>Distinguished Engineer, Formal Verification</b> to join our world-class engineering team in San Jose, California. As a hyper-growth leader in AI infrastructure connectivity, we're revolutionizing how data centers handle explosive AI workloads through cutting-edge PCIe Gen 6/7, CXL, Ethernet, UCIe, and UALink technologies. This is a rare opportunity to shape the formal verification strategy across our entire product portfolio while working on the most advanced connectivity solutions powering the AI revolution.</p>
<p>
In this highly strategic role, you'll serve as Astera Labs' technical authority on formal verification, defining methodologies and best practices that ensure the highest quality standards across all our next-generation connectivity products. You'll work at the intersection of innovation and reliability, leading efforts to catch critical corner-case bugs that traditional verification methods miss, while mentoring a global team of engineers and representing Astera Labs as a thought leader in the formal verification community. This position offers exceptional scope for impact&mdash;your work will directly enable the rack-scale AI infrastructure that's transforming cloud computing and enterprise data centers worldwide.</p>
<p><b>
Key Responsibilities</b></p>
<ul>
<li><b>Strategic Leadership &amp; Methodology Development</b></li>
<li><ul><li>Define and evolve formal verification strategy, methodologies, and best practices across all product lines for PCIe, CXL, Ethernet, UCIe, and UALink protocols</li>
<li>Serve as technical authority on formal verification, providing expert guidance to engineering leadership on risk mitigation and design quality</li>
<li>Represent Astera Labs in industry forums, standards bodies, and technical conferences as a thought leader in formal verification</li>
<li>Drive cross-functional collaboration to influence technical direction across the organization</li>
</ul></li><li><b>Technical Execution &amp; Innovation</b></li>
<li><ul><li>Develop detailed formal verification test plans based on design specifications and collaborate with design teams to refine micro-architecture specifications</li>
<li>Identify key logic components and critical micro-architectural properties essential for ensuring design correctness</li>
<li>Implement formal verification models, abstractions, assertions, and utilize assertion-based model checking to detect corner-case bugs</li>
<li>Apply complexity reduction techniques using industry-standard EDA tools to achieve proof convergence or sufficient depth</li>
<li>Develop and maintain scripts to enhance FV productivity and streamline verification processes</li>
</ul></li><li><b>Team Development &amp; Cross-Functional Partnership</b></li>
<li><ul><li>Mentor Principal and Lead Engineers across global sites in advanced formal verification techniques</li>
<li>Assist design teams with the implementation of assertions and formal verification testbenches for RTL at unit/block levels</li>
<li>Participate in design reviews and collaborate with design teams to optimize design quality and performance, power, area (PPA) metrics based on formal analysis feedback</li>
<li>Prepare and deliver customer meetings and executive presentations with minimal supervision</li>
</ul></li>
</ul><p><b>Basic Qualifications</b></p>
<ul>
<li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field</li>
<li>15+ years of experience in formal verification or 18+ years of experience in traditional design verification with significant formal verification specialization</li>
<li>Strong proficiency in SystemVerilog/Verilog with deep understanding of hardware design verification</li>
<li>Advanced scripting abilities with Python or Perl for automation and productivity enhancement</li>
<li>Proven ability to manage and prioritize multiple high-impact tasks in a dynamic, fast-paced environment with minimal supervision</li>
<li>Strong cross-functional collaboration skills with demonstrated ability to influence technical direction and drive consensus</li>
<li>Entrepreneurial mindset with proactive, customer-focused attitude and ability to think and act quickly while maintaining high quality standards</li>
</ul>
<p><b>Preferred Qualifications</b></p>
<ul>
<li>Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, or Mathematics with focus on formal methods or verification</li>
<li>Hands-on experience with formal verification tools such as Synopsys VCFormal and Cadence JasperGold</li>
<li>Experience with both bug hunting and static proof verification techniques</li>
<li>Familiarity with automating formal verification workflows within a CI/CD environment</li>
<li>Deep knowledge of high-speed serial protocols: PCIe Gen 4/5/6/7, CXL, Ethernet (100G/400G/800G), UCIe, UALink</li>
<li>Participation in industry standards bodies (PCI-SIG, CXL Consortium, IEEE, UCIe Consortium)</li>
<li>Patents or publications in formal verification or hardware verification methodologies</li>
<li>Track record of recruiting, mentoring, and developing formal verification talent across distributed teams</li>
</ul>
<p>Salary range is $230,000 to $285,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.</p><div><p>
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.</p></div></div>

Distinguished Formal Verification

Siliciom Technologies

<div></div><div><div><div><ul><li>ASIC</li><li>
Location: Bangalore</li><li>
Experience: 1 - 5 Years</li></ul><h5 class="jobSectionHeader"><b>
Required Skills &amp; Knowledge:</b></h5><ul><li>
BE/B.Tech/ME/M.Tech or equivalent in ECE/EEE</li><li>
Design and develop test benches using HVLs like System Verilog</li><li>
Deep expertise in Verification Methodologies like OVM, UVM</li><li>
Should have experience in creating verification environment and test plans</li><li>
Domain expertise either Networking protocols / Interface protocols</li><li>
like PCIe, USB, DDR, MIPI, AXI, SATA / SoC Verification is essential</li><li>
Familiarity with Scripting languages</li><li>
Good written and communication skills.</li></ul><p>
To learn more about Siliciom Technologies, please contact us at careers@siliciom.com</p></div></div></div>

Verification Engineer:

Synopsys

<div><p><b>We Are:
</b></p><p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><p></p><p><b><br>
You Are:
</b></p><p>You are a driven engineering professional who thrives in a challenging and innovative environment. You bring a strong sense of ownership to your work, proactively seeking solutions to complex technical challenges. You are passionate about continuous learning and technical growth, always eager to expand your expertise in cutting-edge technologies. Your adaptability and resilience enable you to excel in fast-paced projects with evolving requirements, and your collaborative spirit ensures you work effectively across diverse, multicultural, and global teams. You are highly detail-oriented, with a keen eye for identifying opportunities to optimize processes and drive efficiency.</p><p>
Your communication skills allow you to articulate complex technical concepts clearly, fostering understanding and alignment within your team and beyond. With a commitment to excellence, you are self-motivated and take pride in your ability to deliver high-quality results, even when working independently or across multiple time zones. Your strong interpersonal skills make you an inclusive team player, building trust and fostering a supportive work environment. Above all, you are an innovative thinker who views challenges as opportunities to create impactful solutions, contributing to the ongoing success and technological leadership of Synopsys.</p><p></p><p><b><br>
What You&rsquo;ll Be Doing:</b></p><ul><li>
Defining, validating, and enabling complex multi-rack FPGA-based systems for next-generation hardware solutions.</li><li>
Establishing robust flows and methodologies to streamline product validation and accelerate development cycles.</li><li>
Enhancing team efficiency and productivity through targeted automation and continuous process improvements.</li><li>
Authoring and optimizing scripts in Shell, Perl, Python, and C++ to automate design, verification, and testing workflows.</li><li>
Performing bug verification, release testing, and providing beta support for assigned products to ensure robust quality.</li><li>
Collaborating with global teams to troubleshoot, resolve technical challenges, and integrate new features and technologies.</li><li>
Contributing to the maintenance and improvement of regression test suites and quality assurance processes.</li></ul><p></p><p><b><br>
The Impact You Will Have:</b></p><ul><li>
Accelerate the validation and deployment of industry-leading FPGA-based systems, enabling faster time-to-market for Synopsys solutions.</li><li>
Drive automation initiatives that enhance product quality, reduce manual effort, and increase overall team productivity.</li><li>
Shape and refine methodologies that set the standard for hardware-assisted verification across the industry.</li><li>
Foster innovation by implementing scalable solutions and best practices in design verification and testing.</li><li>
Build technical bridges across global teams, ensuring seamless collaboration and knowledge sharing.</li></ul><p></p><p><b><br>
What You&rsquo;ll Need:</b></p><ul><li>
BS in Electrical Engineering or a related field.</li><li>
Strong grasp of digital concepts and RTL design/verification principles.</li><li>
Solid experience working in Linux environments for development and deployment purposes.</li><li>
Proficiency in scripting languages such as Bash, Python, or Perl for workflow automation and process optimization.</li><li>
Familiarity with hardware-assisted verification products, including emulation or prototyping platforms.</li><li>
Hands-on experience with EDA tools and verification flows, especially in complex verification environments.</li><li>
Knowledge of software quality assurance processes and experience maintaining regression test suites is highly desirable.</li><li>
Understanding of configuration management, build systems, and debugging tools.</li></ul><p></p><p><b><br>
Who You Are:</b></p><ul><li>
Self-motivated and proactive, with a strong sense of ownership and responsibility.</li><li>
Innovative thinker with a proactive approach to solving complex problems.</li><li>
Collaborative and inclusive team player who thrives in a multicultural, global environment.</li><li>
Adaptable and resilient, comfortable working on fast-paced projects with evolving requirements.</li><li>
Detail-oriented with a passion for continuous learning and technical growth.</li><li>
Strong communicator, able to articulate technical concepts clearly and effectively.</li><li>
Excellent analytical and problem-solving skills, with acute attention to detail.</li><li>
Logical thinker with strong interpersonal skills, able to work independently and in distributed teams across time zones.</li></ul><p></p><p><b><br>
The Team You&rsquo;ll Be A Part Of:</b></p><p>
You will join a dynamic, highly skilled engineering team focused on defining and validating advanced FPGA-based systems for hardware-assisted verification. The team is collaborative, innovative, and passionate about pushing the boundaries of electronic design automation. Working closely with global colleagues, you will contribute to the development of industry-leading solutions that enable Synopsys customers to achieve their most ambitious goals.</p><p></p><p><b><br>
Rewards and Benefits:</b></p><p>
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.</p></div>

Validation / Verification Engineer, Staff

Siemens

<div><p><b>Hello Visionary!</b></p><p>
We empower our people to stay resilient and relevant in a constantly changing world. We&rsquo;re looking for people who are always searching for creative ways to grow and learn. People who want to make a real impact, now and in the future. Does that sound like you? Then it seems like you&rsquo;d make a great addition to our vibrant team. Siemens founded the new business unit Siemens Foundational Technologies (formerly known as Siemens IoT Services) on April 1, 2019 with its headquarter in Munich, Germany. It has been crafted to unlock the digital future of its clients by offering end-to-end support on their outstanding digitalization journey. Siemens Foundational Technologies is a strategic advisor and a trusted implementation partner in digital transformation and industrial IoT with a global network of more than 8000 employees in 10 countries and 21 offices. Highly skilled and experienced specialists offer services which range from consulting to craft &amp; prototyping to solution &amp; implementation and operation &ndash; everything out of one hand.</p><p><b>
We are looking for a Verification and Validation Engineer</b></p><p><b>
You&rsquo;ll make a difference by:</b></p><ul><li>
1) Competent on functional Testing [black box], Traceability, Analysing Test matrices, Verification and Validation Plan &amp; Report</li><li>
2) Competent in Railway Domain System/Software V&amp;V. Preferably in IXL and SCADA.</li><li>
3) Competent in Ladder Programming and related tools.</li><li>
4) Capable of combining different sources and types of evidence and analysing the results</li><li>
5) Candidate must possess but not limited to Good Analytical skills, Interpersonal Skill, Proactive, Resilience &amp; Teamworking ability</li><li>
6) Understand relevant parts of CENELEC 50128</li><li>
7) Preferably certified for ISTQB Foundation and ISTQB Test Analyst</li><li>
8) Able to Derive test cases from specifications</li><li>
9) SW Testing Experience, Handle test reports and Validation reports</li><li>
10) Competent in handling tools like JIRA, RTC, DOORS etc..</li><li>
11) check the adequacy (completeness, consistency, correctness, relevance and traceability of the documented evidence from review, integration and testing with the specified verification objectives</li><li>
12) develop and maintain records on the verification activities</li><li>
13) competent in the domain where verification is carried out e.g. software requirements, data, code etc..</li></ul><p><b><br>
Desired Skills:</b></p><ul><li>
5-10 years of experience is required.</li><li>
Great Communication skills.</li><li>
Analytical and problem-solving skills</li></ul><p><b>
Join us and be yourself!</b></p><p>
We value your unique identity and perspective and are fully committed to providing equitable opportunities and building a workplace that reflects the diversity of society. Come bring your authentic self and create a better tomorrow with us.</p><p><b>
Make your mark in our exciting world at Siemens.</b></p><p>
This role is based in <b>Pune </b>and is an Individual contributor role. You might be required to visit other locations within India and outside. In return, you'll get the chance to work with teams impacting - and the shape of things to come. We're Siemens. A collection of over 379,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and imagination and help us shape tomorrow.</p><p><b>
Find out more about Siemens careers at: </b><b>www.siemens.com/careers</b><b> &amp; more about mobility at</b> <b>https://new.siemens.com/global/en/products/mobility.html</b></p></div><p></p>

Verification and Validation Engineer

<div></div><div><div><div><ul><li>ASIC</li><li>
Location: Bangalore</li><li>
Experience: 3 - 5 Years</li></ul><h5 class="jobSectionHeader"><b>
Required Skills &amp; Knowledge:</b></h5><ul><li>
B. Tech / M. Tech with hands on experience into Physical verification at block-level&amp; chip-level.</li><li>
DRC, LVS DFM, Antenna, Density Fill Routines and other Tape-out sign-off experience is a must.</li><li>
Experience using Synopsys ICC Tool.</li><li>
Tape-out experience of multiple complex chips at 14 nm or below is required.</li><li>
Experience with Mentor Calibre or Synopsys ICC and ICV is a must.</li><li>
Programming experience in tcl, Perl or C.</li><li>
Proficient in planning for and addressing electrical considerations throughout the design process (EM, IR, Noise, etc.).</li><li>
Physical verification flow automation exposure will be an added advantage.</li></ul><p>
To learn more about Siliciom Technologies, please contact us at careers@siliciom.com</p></div></div></div>

Physical Verification Engineer:

Micron Technology

<div><p><b>Our vision is to transform how the world uses information to enrich life for </b><b><i>all</i></b><b>.
</b></p><p>Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.</p><p></p><p><b>
Roles &amp; responsibilities can include but are not limited to:</b></p><ul><li>
Participate in simulating, analyzing, and debugging pre-silicon full chip designs by applying leading edge verification technique</li><li>
Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.</li><li>
Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements.</li><li>
Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design.</li><li>
Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.</li><li>
Analytical capability for complex gate level circuit designs</li><li>
Basic understanding of CMOS circuit designs</li><li>
Familiar with both SPICE and Verilog simulations</li><li>
Good communication skills and ability to work well in a team</li></ul><p></p><p><b>
About Micron Technology, Inc.</b></p><p>
We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life <i>for all</i>. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron&reg; and Crucial&reg; brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities &mdash; from the data center to the intelligent edge and across the client and mobile user experience.<br>
<br>
To learn more, please visit micron.com/careers<br>
<br>
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.<br>
<br>
To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com</p><p></p><p>
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.</p><p></p><p>
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.</p><p></p><p>
AI alert<b>:</b> Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
</p><p></p><p>Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.</p></div><p></p>

SR ENGINEER, DPG GRAPHICS VERIF

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