digital design engineer

Credo Semiconductor

<div>Credo is engineering the future of high-speed connectivity for the AI-driven world. With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyperscale data centers. 
Credo is pioneering a systems-level approach to connectivity, integrating hardware, software, and architecture to deliver holistic solutions. This strategy not only differentiates us in the market but also creates significant value for our customers by accelerating deployment, improving performance, and reducing complexity across their infrastructure. 
At Credo, you&rsquo;ll be part of a team of world-class technologists and engineers that thrive on pushing the limits of what&rsquo;s possible for some of the world&rsquo;s most important companies. Our portfolio includes cutting edge solutions including our software, optical DSPs, PCIe/CXL products, SerDes IP, and advanced Active Electrical Cables (AECs) all designed for maximum performance, energy efficiency, and scalability. 
We foster a culture of technical excellence, collaboration, and continuous learning, where your ideas can shape the future of connectivity. From silicon architects to systems engineers, every role at Credo contributes to solving real-world problems at scale.

Join us and help us architect the next generation of disruptive networking technologies &mdash; because at Credo, We Connect. 
About the Role

We&rsquo;re looking for a Senior Digital Design Engineer to lead front-end ASIC design efforts, including architecture, implementation, and verification of complex logic blocks. You&rsquo;ll collaborate across design, verification, and physical teams to ensure successful tape-outs, while contributing to microarchitecture specs, IP integration, and chip bring-up. This role combines technical depth with cross-functional teamwork to deliver high-performance digital solutions. 
Responsibilities
<ul>
<li>Write microarchitecture and/or design specifications.</li>
<li>Architect/design, implement, and debug complex logic blocks.</li>
<li>Understand and integrate complex IPs from internal and external IP vendors.</li>
<li>Support all front-end integration activities like Lint, CDC, Synthesis, and ECO.</li>
<li>Develop functional tests/testbenches and run functional RTL and Gate-Level verification/simulations.</li>
<li>Work with other ASIC Design/Verification, DFT and Physical Design Engineers in achieving a successful tape out.</li>
<li>Collaborate with Software, Firmware, Applications, and Systems teams to ensure a high-quality product.</li>
<li>Bring-up, validate, and debug functional features in the chip.</li></ul> 


Basic Qualifications
<ul>
<li>BS or MS in Electrical Engineering, Computer Engineering, or related field with 5&ndash;10 years of experience in digital ASIC design</li>
<li>Strong understanding of digital logic design, including synchronous and asynchronous interfaces</li>
<li>Proficiency in Verilog/SystemVerilog RTL design</li>
<li>Experience developing testbenches and test cases for block-level and top-level verification</li>
<li>Familiarity with UVM methodology</li>
<li>Hands-on experience with gate-level simulations, chip bring-up, and validation</li>
<li>Knowledge of synthesis and static timing analysis</li>
<li>Proficiency in scripting languages such as Python, Tcl, Perl, or Shell</li>
<li>Strong planning and estimation skills</li>
<li>Effective communicator and collaborative team player</li></ul> 


The base salary range for this position is $140,000 &ndash; $170,000 a year. The base salary ultimately offered is determined through a review of education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits. 
Credo is an Equal Opportunity Employer. We are committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis. 
If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email people@credosemi.com.</div>

Senior Digital Design Engineer

Northrop Grumman

<div>RELOCATION ASSISTANCE: Relocation assistance may be available
CLEARANCE TYPE: Secret
TRAVEL: Yes, 10% of the Time<h2 class="jobSectionHeader">
Description</h2>
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work &mdash; and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. 
Job Description
Northrop Grumman Mission Systems is a trusted provider of mission-enabling solutions for global security. Our Engineering and Sciences (E&amp;S) organization pushes the boundaries of innovation, redefines engineering capabilities, and drives advances in various sciences. Our team is chartered with providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission! 
The Navigation, Targeting, and Survivability Division (NTSD), located in the Northwest Chicago suburbs, develops operational Electronic Warfare (EW) and targeting systems that provide situational awareness, self-protection, and offensive electronic attack capability to platforms across the spectrum from visible light IR to millimeter wave RF. By joining us, you&rsquo;ll work on projects that help safeguard our nation related to land forces, rotary wing survivability systems, international and U.S. military electronic warfare systems, communications systems, missile warning systems and sensors, infrared counter-measure systems (IRCM), automatic test equipment, modeling and simulation, and situational awareness programs. The Hardware Engineering organization plays a key role in developing these solutions. 
The Principal/Sr. Principal Digital Design Engineer role involves full life-cycle product development from system concept and requirements through design, implementation, test verification, production, and field support while working in integrated product teams spanning Engineering, Manufacturing, and Program Management. Digital subsystem and circuit card designs utilize the latest FPGA technologies from all major vendors and device families including Xilinx, Altera, and Actel, and support high speed interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces. 
This position will be full-time and on-site at our Rolling Meadows, IL. location 
This position may be filled at either a Principal or Sr. Principal Digital Design Engineer level based on the qualifications listed below. 
Basic Qualifications for a Principal Digital Design Engineer:<ul><li>Bachelors&rsquo; degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 5 years of digital electronics design experience or a Master&rsquo;s degree in Electrical Engineering, Computer Engineering or similar engineering discipline and 3 years of digital electronics design experience.</li><li>Digital circuit design experience, including simulation &amp; schematic capture through test and integration</li><li>Prior hands-on prototyping and debug experience testing complex digital subsystems, such as complex circuit card development involving FPGAs, and/or embedded processors, and/or high-speed interfaces.</li><li>Demonstrated ability to lead projects with 2 or less team members.</li><li>Demonstrated ability to translate system performance and operational specifications into hardware requirements, design, and test specifications.</li><li>Familiarity with documentation revision control and review systems similar to DOORS, ClearCase, and ClearQuest.</li><li>US Citizen</li><li>Ability to obtain and maintain a Secret security clearance.</li></ul> 
Basic Qualifications for a Sr. Principal Digital Design Engineer:<ul><li>Bachelors&rsquo; degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 8 years of digital electronics design experience or a Master&rsquo;s degree in Electrical Engineering, Computer Engineering or similar engineering discipline and 6 years of digital electronics design experience.</li><li>Extensive digital circuit design experience, including simulation &amp; schematic capture through test and integration.</li><li>Extensive hands-on prototyping and debug experience testing complex digital subsystems, such as complex circuit card development involving FPGAs, and/or embedded processors, and/or high-speed interfaces</li><li>Demonstrated ability to lead projects with 2 or more team members.</li><li>Demonstrated ability to translate system performance and operational specifications into hardware requirements, design, and test specifications.</li><li>Familiarity with documentation, revision control and review systems similar to DOORS, ClearCase, and ClearQuest.</li><li>US Citizen</li><li>Ability to obtain and maintain a Secret security clearance.</li></ul> 
Preferred Qualifications:<ul><li> Advanced degree in Electrical or Computer Engineering with a minimum 10 years of digital electronics design experience.</li><li>Working knowledge of Electronic Warfare systems.</li><li>Experience in Aerospace and/or Defense industries.</li><li>Recent circuit card design experience utilizing circuit-related tools including Cadence Concept, Allegro, and/or Mentor DxDesigner, Expedition.</li><li>Working experience with ClearCase/ClearQuest and DOORS Current Secret or Top-Secret Security Clearance.</li><li>Proven skills to include: team leadership, mentoring others, communicating with all levels of an organization internally and externally, being adaptable, creative, collaborative and also comfortable working independently and enjoying solving difficult problems.</li></ul>
Primary Level Salary Range: $105,400.00 - $158,000.00
Secondary Level Salary Range: $131,100.00 - $196,700.00
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.
Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.</div>

Principal/Sr. Principal Digital Design Engineer

Qualcomm

<div><h2 class="jobSectionHeader">Company:</h2>
Qualcomm India Private Limited<h2 class="jobSectionHeader">
Job Area:</h2>
Engineering Group, Engineering Group &gt; Hardware Engineering
General Summary:<div>
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.</div>
Minimum Qualifications:<ul><li>Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
</li></ul>OR 
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
 
OR 
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.<ul><li>
Responsibilities<ul><li>
Front-End implementation of MSIP (Temp/Voltage/Security Sensors, Controllers) designs</li><li>
RTL development and its validation for linting, clock-domain crossing, conformal low power and DFT rules.</li><li>
Work with functional verification team on test-plan development and debug.</li><li>
Develop timing constraints, deliver synthesized netlist to physical design team, and provide constraints support for PD STA.</li><li>
UPF writing, power aware equivalence checks and low power checks.</li><li>
DFT insertion and ATPG analysis for optimal SAF, TDF coverage.</li><li>
Provide support to SoC integration and chip level pre/post-silicon debug.</li></ul></li><li>
Skills &amp; Experience<ul><li>
MTech/BTech in EE/CS with hardware engineering experience of 3+ years.</li><li>
Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA.</li><li>
Experience with post-silicon bring-up and debug is a plus.</li><li>
Able to work with teams across the globe and possess good communication skills.</li></ul></li></ul>
Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
If you would like more information about this role, please contact Qualcomm Careers.</div>

MSIP Senior Digital Design Engineer

CoMira Solutions PK

CoMira Solutions is Hiring &ndash; Senior Verification/Design EngineerWe&rsquo;re looking for a hands-on engineer with expertise in digital ASIC verification using SystemVerilog/UVM.Key Responsibilities:<ul><li>Develop and verify RTL design implementations</li><li>Build UVM environments, test benches &amp; verification components</li><li>Plan, implement &amp; analyze functional coverage</li><li>Debug verification environments &amp; recreate field issues</li><li>Work with protocols like Ethernet (802.3), PCIe, CXL, and security algorithms</li></ul>Requirements:<ul><li>3&ndash;5 years of relevant experience</li><li>Strong in SystemVerilog, UVM, scripting (Perl/Python/Shell)</li><li>Familiar with QuestaSim, VCS, or Cadence Incisive</li><li>Bachelors/Masters in Electrical or Computer Engineering</li></ul>How to Apply: Send your resume to Huma.asif@comira.pkJob Type: Full-timeWork Location: In person

Design Verification Engineer

MAXVY

<div>Location : Bangalore
Experience : 3 Years
Education : B.E, M.E, M.Tech, B.Tech
Role :
Key Responsibilities:<ul><li> 
Design, implement, and verify FPGA logic using Verilog/SystemVerilog on the ZCU-102 board.</li><li> 
Integrate and validate Xilinx IP cores using Vivado Design Suite and Vitis.</li><li> 
Perform hardware/software co-design on the Zynq UltraScale+ MPSoC.</li><li> 
Implement high-speed interfaces such as MIPI CSI/DSI, HDMI, USB, Ethernet, DDR4, etc.</li><li> 
Support board-level bring-up, signal integrity testing, and hardware debugging using lab equipment (oscilloscopes, logic analyzers, etc.).</li><li> 
Perform timing analysis, constraints setup, and optimization to meet performance and resource requirements.</li><li> 
Document design specifications, test plans, and validation reports.</li></ul> 
Required Skills &amp; Experience:<ul><li> 
Bachelor&rsquo;s or Master&rsquo;s in Electronics, Electrical, or Computer Engineering.</li><li> 
Hands-on experience with Xilinx ZCU-102 or similar MPSoC development boards.</li><li> 
Proficient in Vivado, Vitis, Xilinx SDK.</li><li> 
Strong knowledge of AXI interconnect, memory-mapped interfaces, Processor and IP integration.</li><li> 
Experience with version control tools (e.g., Git), scripting (Python, Tcl, Bash), and lab testing.</li></ul> 
Preferred Skills:<ul><li> 
Experience with MIPI interfaces, video processing pipelines, or sensor integration.</li></ul><div></div> 
Job Description :
We are seeking an experienced FPGA Design Engineer to contribute to the development and verification of digital systems using the Xilinx ZCU-102 Evaluation Board. The ideal candidate will be proficient in FPGA design flows, embedded systems integration, and high-speed interface protocols. This role involves working on cutting-edge applications involving high-performance computing, image processing, networking, and system-level integration.
Salary : Open to Discussion</div>

FPGA Design Engineer

UCPro LLP

We are seeking passionate and dedicated *Electronics Design Engineer Trainees* to join our dynamic team. This role is ideal for fresh graduates who are eager to build a long-term career in circuit-level design. The candidate will work on the design, development, and testing of electronic circuits for various applications.Key Responsibilities:* Design, simulate, and test electronic circuits and components.* Assist in schematic design, PCB layout, and prototype development.Required Skills &amp; Qualifications:* Diploma or Bachelor&rsquo;s degree in Electronics and Communication Engineering, Electrical Engineering, or related fields.* Solid understanding of circuit design principles, analog and digital electronics.* Basic knowledge of microcontrollers, sensors, and embedded hardware.* Willingness to learn and work in a long-term, in-office position.Job Type: Full-timePay: &#8377;5,000.00 - &#8377;15,000.00 per monthBenefits:<ul><li>Work from home</li></ul>Work Location: In person

Electronic Design Engineer

SILVUS TECHNOLOGIES

<div><div>THE COMPANY

Silvus Technologies is dedicated to one mission: connecting those who keep us safe. We do so by delivering the most advanced Mobile Ad-hoc Network (MANET) radios powered by our custom and ever-evolving Mobile-Networked MIMO waveform. Together, our radios and waveform provide the vital communications for mission critical applications in the harshest environments from underground tunnels to high altitude balloons.

Silvus StreamCaster&reg; radios are being rapidly adopted by customers all over the world ranging from the U.S Departments of Defense, to International, Federal, State and Local Law Enforcement agencies, all the way to the Super Bowl, Grammys and industry-leading drone, robot, and other unmanned systems manufacturers.

 Wouldn't you like to join an incredibly talented group of people, doing very challenging work, with the prime directive of &quot;Keeping Our Heroes Connected&quot;?

Silvus' rapid growth is fueled by a focus on research and innovation and a team of the most passionate, skilled, and creative thinking individuals. If you are looking for a challenging experience, you owe it to yourself to learn how Silvus can provide a rewarding opportunity that creates a pathway to a fulfilling career.</div>
THE OPPORTUNITY

Silvus is seeking a full-time FPGA Design Engineer reporting to the Director of FPGA Engineering on the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products. In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&amp;D. These are exciting projects targeted to address challenging real-world communication needs.

The FPGA Design Engineer position will be based at Silvus headquarters in the heart of vibrant West Los Angeles, CA and is on a hybrid schedule; a minimum of 3 days onsite per week is expected. On-site days are Mondays, Wednesdays, and Thursdays.

The following is a list of at least some of the current essential job functions of the position. Management may assign or reassign duties and responsibilities at any time at its discretion.

ROLE AND RESPONSIBILITIES
<ul>
<li>Digital design architecting for wireless communication projects.</li>
<li>Fixed point design of signal processing blocks while working with systems engineers.</li>
<li>RTL coding, simulation, and test bench development.</li>
<li>FPGA synthesis and timing closure.</li>
<li>Hardware verification and troubleshooting; familiarity with logic analyzers.</li>
<li>Provide support to the RF and Software Engineering teams.</li>
</ul>
REQUIRED QUALIFICATIONS
<ul>
<li>Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields plus a minimum of 2 years of demonstrated experience in FPGA design; OR an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or related fields</li>
<li>Proven expertise working with multiple clock-domain, high-utilization FPGA designs.</li>
<li>Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.</li>
<li>Experience with tcl or python.</li>
<li>Must be U.S. Person (U.S. Citizen, or Permanent Resident) due to clients under U.S. federal contracts.</li>
<li>All employment is contingent upon the successful clearance of a background check.
</li></ul>PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES
<ul>
<li>Master of Science degree in Electrical Engineering (MSEE).</li>
<li>Demonstrated experience with fixed point binary arithmetic, and digital signal processing designs.</li>
<li>Experience using MATLAB.</li>
<li>Experience with communication systems on FPGA or ASIC designs.</li>
</ul>
WORKING CONDITIONS &amp; PHYSICAL REQUIREMENTS
<ul>
<li>Office environment.</li>
<li>Occasional exposure to heat, cold, and allergens while performing tests or demonstrations in the field.</li>
<li>While performing the duties of this job, the employee is required to do the following:
<ul><li>Lift equipment up to 20 lbs. for the set-up of demonstrations and testing.</li>
<li>Perform bending and reaching movements to place items on lower and higher shelves.</li>
<li>Kneeling or squatting to access lower shelves.</li>
<li>Walking/Moving in the labs</li>
</ul>
</li></ul><div>NOTE - As a U.S. Federal Contractor, Silvus Technologies requires that ALL candidates being considered for employment for any position (regardless of level) MUST be a U.S. Person (permanent resident or citizen). Stricter U.S. Citizen ONLY requirements are needed for some Engineering or R&amp;D roles. This generally does NOT apply to International positions; only job postings for positions located in the U.S. Exceptions will be included in the Required Qualifications section of the posted position.
All Employment is contingent upon the successful clearance of a background check.
<div>
Silvus is proud to be an equal-opportunity employer, and we value diversity. We do not discriminate on the basis of race, color, age, religion or belief, ancestry, national origin, sex (including pregnancy), sexual orientation, gender identity and/or expression, marital, civil union or domestic partnership status, physical or mental disability, protected veteran status, genetic information, political affiliation, or any other factor protected by applicable federal, state, or local laws. 
 
We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive benefits and privileges of employment. Please contact us to request accommodation. 
 
<ul><li>Silvus does not accept unsolicited resumes from individual recruiters or third-party recruiting agencies in response to job postings. No fee will be paid to third parties who submit unsolicited candidates directly to Silvus Technologies.</li></ul></div></div></div>

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