power integrity engineer

Capgemini Engineering

<div><div><div><div><h2 class="jobSectionHeader"><b>Job Description
</b></h2></div><div><h3 class="jobSectionHeader"><b>Your Role
</b></h3><p><b>As an SI Simulation Engineer, you will be responsible for performing high-speed Signal Integrity (SI) and Power Integrity (PI) simulations and testing across advanced interfaces and platforms. You will work closely with design and layout teams to ensure optimal signal performance and reliability in complex hardware systems.
</b></p><p><b>In this role, you will:
</b></p><ul><li><b>Perform pre- and post-layout SI/PI analysis for die, package, and board-level designs.
</b></li><li><b>Conduct simulations using IBIS/IBIS-AMI models and analyze eye diagrams to recommend equalization settings.
</b></li><li><b>Analyze S-parameters including insertion loss, return loss, crosstalk, and TDR.
</b></li><li><b>Provide layout constraints and recommendations to ensure signal integrity.
</b></li><li><b>Select appropriate stack-up materials including dielectric, copper thickness, and impedance control.
</b></li><li><b>Work with high-speed interfaces such as PCIe Gen3/4/5, DDR4/5, LPDDR4/5, 10G Ethernet, and USB 3.2 Gen1/2.
</b></li><li><b>Utilize tools like oscilloscopes and VNAs for hardware validation and debugging.
</b></li><li><b>Identify technical issues and perform root cause analysis for effective resolution.
</b></li></ul><p></p><h3 class="jobSectionHeader"><b>Your Profile
</b></h3><ul><li><b>Bachelor&rsquo;s or Master&rsquo;s degree in Engineering (BE/B.Tech/M.E/M.Tech or equivalent).
</b></li><li><b>7&ndash;10 years of experience in high-speed SI/PI simulations and testing.
</b></li><li><b>Strong expertise in interfaces such as PCIe, DDR, LPDDR, Ethernet, and USB.
</b></li><li><b>Hands-on experience with IBIS/IBIS-AMI models and eye diagram analysis.
</b></li><li><b>Proficient in S-parameter analysis and signal integrity metrics.
</b></li><li><b>Knowledge of stack-up design including dielectric selection and impedance control.
</b></li><li><b>Experience providing layout constraints and collaborating with design teams.
</b></li><li><b>Good to have: experience with oscilloscopes, VNAs, and hardware debugging tools.<br>
</b><br>
<p><b>What You&rsquo;ll Love About Working Here
</b></p><p><b>We value flexibility and support our employees with remote work options and adaptable schedules to maintain a healthy work-life balance. Our inclusive culture brings together diverse professionals committed to growth, innovation, and excellence. You&rsquo;ll have access to continuous learning opportunities and certifications in emerging technologies like cloud and AI.
</b></p><p><b>-
</b></p><p><b>About Us
</b></p><p><b>At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world&rsquo;s most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&amp;D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same.</b></p></li></ul></div></div></div></div>

Signal Integrity / Power Integrity Engineer

Global Engineering Services

<p><b>Company:</b> Global Engineering Services<br/><b>Location:</b> Gulberg 3, Lahore, Pakistan<br/><b>Education:</b> BS Electrical Engineering (Electronics)</p><p><b>Working Hours:</b> 9:00 AM to 6:00 PM (Monday to Friday)</p><p><b>Position Overview:</b><br/>We are currently seeking a dedicated Signal &amp; Power Integrity Analyst to join our team. As a Signal &amp; Power Integrity Analyst, you will play a crucial role in ensuring the reliability and robustness of our hardware systems, contributing to the success of our projects.</p><p><b>Key responsibilities:</b></p><ul><li>Good idea of Schematic reading, design flow, BOM etc.</li><li>Able to read &amp; extract the relevant data from electronics components datasheets</li><li>Understanding of EMC/EMI &amp; RF signals</li><li>Investigate the simulation results, dig out the reasons &amp; provide solutions</li><li>Develop test procedures for Signal Integrity testing</li><li>Pre &amp; Post layout simulation</li><li>Generate comprehensive reports detailing simulation results and recommendations for improvement</li><li>Simulate effects of crosstalk on signal integrity</li><li>Integrate IBIS models to accurately simulate component behavior in the design environment</li><li>Experience of EDA &amp; PCB layout tools will be plus point</li><li>Knowledge of high-speed digital interfaces such as DRAM/PCIe/SerDes/DDR etc.</li><li>Excellent communication skills</li><li>Experience in the Signal &amp; Power Integrity field shall be preferred</li><li>Fresh Grads are also encouraged to apply</li></ul><p><b>Salary:</b> Market competitive with incentives like Health &amp; Life insurance, Provident Fund, EOBI, Mobile &amp; Internet allowance, and Annual Bonus.</p><p>Job Type: Full-time</p><p>Work Location: In person</p>

Signal & Power Integrity Engineer

Tata Consultancy Services (TCS)

<div></div><div><div><div><div><p>Job Role: SI/PI Engineer</p>
<p>Experience: 4-10 years<br>
Location: Bangalore, Hyderabad<br>
<br>
Job Summary</p>
<p>SI/PI engineer will be responsible for analyzing, designing, and optimizing high-speed signal transmission in electronic circuits and systems. The role focuses on ensuring robust signal quality, minimizing noise, pin map optimizations and maintaining high performance in PCB, Package substrate ,Integrated Circuit, and system-level designs.</p>
<p><b>Key Responsibilities</b></p>
<p>Signal and Power Integrity Analysis &amp; Simulation:</p>
<ul><li>Perform pre-layout and post-layout SI simulations in time and frequency domain</li></ul>
<ul><li>Analyze crosstalk, jitter, reflections, bit error rates and eye diagrams to optimize signal integrity and timing analysis.</li></ul>
<ul><li>3D EM modelling the passive PCB structures and Connectors.</li></ul>
<ul><li>Conduct power integrity (PI) analysis to ensure stable power delivery to high-speed circuits</li></ul>
<p><b>Required Technical Skills and Experience</b></p>
<p>A Signal Integrity and Power Integrity (SI/PI) Expert with 4 to 8 years of experience</p>
<ul><li>High-Speed Signal Analysis:</li></ul>
<p>Expertise in fundamental electromagnetic theories associated with transmission line theories, crosstalk, scattering matrix, peak distortion analysis and Jitter analysis.</p>
<ul><li>Simulation Tools:Hands-on experience with tools Cadence Sigrity, Ansys HFSS, Ansys SiWave, Keysight ADS is must. Good to have expertise in other similar tools</li></ul>
<ul><li>High-Speed Interfaces:Must have deep understanding of electrical specifications for LPDDRx, DDRx, Ethernet, PCIe USB, HDMI, MIPI, and SerDes.</li></ul>
<ul><li>PCB Design &amp; Layout:Strong knowledge of high-speed PCB layout techniques, stack-up design, and routing guidelines.</li></ul>
<ul><li> Power Integrity: Strong understanding of PDN and hands on analysis expertise on Power Delivery Network with FD and TD simulations.</li></ul>
<ul><li>Testing &amp; Measurement:Good to have experience with oscilloscopes, TDR, VNA, and other lab equipment.
</li></ul>
</div></div></div><div><div><div><b>Location</b></div>
<div>Hyderabad</div>
</div><div><div><b>Job Function</b></div>
<div>TECHNOLOGY</div>
</div><div><div><b>Role</b></div>
<div>Engineer</div>
</div><div><div><b>Job Id</b></div>
<div>376988</div>
</div><div><div><b>Desired Skills</b></div>
<div>Hw Design</div>
</div></div><p>Desired Candidate Profile
</p><div><div><b>Qualifications</b> : BACHELOR OF ENGINEERING</div></div></div><div></div>

SI/PI Engineer

<div></div><div><div><div><div><p>Experience: 4-7 years<br>
Location: Hyderabad<br>
Must Have Skill:
</p><ul><li>4 to 7 years years professional experience as a hardware Architect, board design engineer, hardware engineer, or related position Background in product development preferred</li>
<li>Experience in high speed digital / analog, implementation, bring up, functional testing and debugging</li>
<li>Proficient in use of Schematic and PCB design tools - OrCAD, Allegro
</li><li>Familiarity with high speed memory / peripheral interconnects - DDR 2/3/4, Flash, SDIO, PCI, PCIe, USB 2/3, SPI, HDMI, DP, SATA, etc
</li><li>Experience in generating PCB Layout guidelines and close interfacing with PCB Design team
</li></ul><p>OR
</p><ul><li>Expertise on Signal integrity and power integrity</li>
<li>Simulation Tools: Hands-on experience with tools Cadenc Sigrity, Ansys HFSS, Ansys SiWave, Keysight ADS is must. Good to have expertise in other similar tools</li>
</ul>
<p>High-Speed Interfaces: Must have deep understanding of electrical specifications for LPDDRx, DDRx, Ethernet, PCIe USB, HDMI, MIPI, and SerDes</p>
<p>Good To Have: Very conversant with usage of hardware test equipment: High speed DSO, Logic Analyzer, Spectrum Analyzer, Network Analyzers, Traffic Generators, etc.</p>
<p>Roles &amp; Responsibility : Job requires Hardware board design or SI/PI skills</p>
</div></div></div><div><div><div><b>Location</b></div>
<div>Hyderabad</div>
</div><div><div><b>Job Function</b></div>
<div>TECHNOLOGY</div>
</div><div><div><b>Role</b></div>
<div>Engineer</div>
</div><div><div><b>Job Id</b></div>
<div>374255</div>
</div><div><div><b>Desired Skills</b></div>
<div>Hw Design</div>
</div></div><p>Desired Candidate Profile
</p><div><div><b>Qualifications</b> : BACHELOR OF ENGINEERING</div></div></div><div></div>

Hardware Board Design

<p></p><div><p>Job ID 2025-16196</p>
<p>Date posted Nov. 10, 2025</p>
<p>Location Bengaluru, India
</p><p>Category Design Engineering</p></div><p></p>
<br><div><p>Job Description</p><p>
Looking for your next career challenge? We seek an experienced Electronics Engineer specializing in PCB Signal / Power Integrity to join Arm&rsquo;s Packaging, Boards and Multiphysics team. You will be involved with systems that incorporate Arm processors, focusing on SI and PI analysis of System-on-Chip (SoC) to board integration. We are working at the forefront of embedded compute focusing on developing hardware platform prototypes to validate and demonstrate Arm's latest IP products.</p><p>
Responsibilities:</p><p>
Collaborate with engineering teams across geographies to perform system-level signal integrity and power integrity including silicon, package, and board. Work alongside the chip packaging and PCB design teams, to support routing strategies, design rules and layer optimization to ensure optimal performance, reliability, and cost-effectiveness. Lead system level signal integrity analysis and propose solutions to meet interface timing. Collaborate with electrical validation for post silicon correlation. Perform board/system-level power delivery network AC+DC simulation for low-voltage/high-current supplies.</p><p>
Required Skills and Experience:</p><ul><li>
8+ Years of Experience with strong understanding of hardware architectures, electronics and embedded compute</li><li>
Deep knowledge of high-speed Signal and Power Integrity and timing analysis techniques, across silicon, package and board. Electromagnetic modeling of 3-D structures</li><li>
Expertise in SI analysis of high density SoC's. Optimize signal paths for signal quality and prevent signal degradation. Verify routing strategy with a particular stack-up and rule set</li><li>
Deep understanding of multi-port matrixes (S, Y, Z parameters)</li><li>
Detailed understanding of high-speed interface standards e.g. PCIe Gen 5/6/7 and DDR4/5 and LPDDR4/5/5x/6 memory technologies, USB, Ethernet</li><li>
Familiarity with different IC packaging technologies and their impact on PCB design to ensure seamless integration of SoCs, ensuring proper signal routing and power delivery</li><li>
Experience of collaborating with chip packaging teams. Ability to influence SoC device pin-outs for performance optimization, routing feasibility and layer trade-off analysis</li><li>
Understanding of the PCB fabrication process (PTH and HDI), stackup/via topologies and substrate materials</li><li>
Proficiency in the use of Signal Integrity tools from ANSYS, Siemens EDA and PCB Layout specifically Cadence Allegro PCB suite and OrCAD CIS</li><li>
Good communication and interpersonal skills. Positive can-do attitude and attention to detail</li></ul><p>
&ldquo;Nice To Have&rdquo; Skills and Experience :</p><p>
Experience in any of the following would enhance the application:</p><ul><li>
Good understanding of SoC implementations and models (IBIS models, power models, impedance profiles of power delivery networks)</li><li>
Experience of design automation and scripting</li><li>
Embedded hardware debug using laboratory test equipment (e.g. oscilloscopes, VNAs)</li><li>
Enjoy collaborating across geographies with multiple teams</li></ul><p>
In Return:</p><p>
You will gain a deeper understanding of high-performance compute platforms! You'll be working alongside other engineering teams, in a friendly supportive environment collaborating with highly motivated, like minded engineers, producing high quality designs incorporating Arm IP. You will enjoy new technical challenges faced when using advancing technologies!</p><p></p><p>
#LI-SC2</p><p>
Accommodations at Arm</p><p>
At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.</p><p>
Hybrid Working at Arm</p><p>
Arm&rsquo;s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team&rsquo;s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.</p><p>
Equal Opportunities at Arm</p><p>
Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don&rsquo;t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.</p></div>

Staff Electronics SI/PI Engineer

Oracle

<div><p>Oracle&rsquo;s Cloud Infrastructure (OCI) Hardware Development organization seeks a talented and hands-on Principal Electrical Engineer to join our team in Burlington, MA! Here is your opportunity to help shape the architecture, detailed design, bring-up, and delivery of next-generation, high-end GPU servers and infrastructure platforms powering Oracle&rsquo;s fast-growing public cloud, AI, and enterprise offerings.
</p><p>You will be a key member of a focused, high-impact hardware team working directly alongside experts in signal and power integrity, system validation, CAD, firmware, diagnostics, operations, and mechanical engineering. This is a highly collaborative and technically demanding role where you&rsquo;ll be closely involved from initial concept and requirements through prototype design, hands-on lab bring-up, debug, validation, and transition to full mass production. As many of these responsibilities require direct access to our state-of-the-art hardware labs and real-time, in-person engagement with cross-functional teams, the position is based on-site in our Burlington engineering campus.
</p><p>We offer the unique excitement of designing in-house products for massive scale, with full design ownership and opportunities for mentoring, technical leadership, and direct impact on Oracle&rsquo;s next-generation cloud technologies.</p></div>
<br><div><p><b>Detailed Responsibilities
</b></p><ul><li>Lead parts selection and qualification for high-performance x86/ARM CPUs, GPUs, FPGAs, advanced memory, VRDs, network and storage controllers, and supporting components.
</li><li>Perform schematic capture and board floor planning for complex, multi-processor server boards using industry-standard CAD tools (Cadence, Concept, Allegro).
</li><li>Provide guidance and collaborate closely with CAD designers for component placement, routing, and review of schematic and PCB layout, ensuring best practices and performance targets.
</li><li>Author, maintain, and publish accurate and comprehensive hardware specifications, bills of materials, configuration guides, and all necessary technical documentation.
</li><li>Develop, implement, and automate test plans and validation strategies at the board and system level; bring up and thoroughly validate prototypes.
</li><li>Collaborate with Signal Integrity (SI) and Power Integrity (PI) engineers for pre-layout and post-layout simulation, planning, and problem solving.
</li><li>Work hands-on in the Burlington hardware lab for prototype bring-up, rework, debug, and analysis using oscilloscopes, logic analyzers, and SI/PI test tools
</li><li>Lead and participate in formal, cross-functional design reviews; set technical direction, ensure all requirements are addressed, and foster a culture of technical excellence.
</li><li>Conduct root-cause analysis and debug of highly complex hardware problems; drive swift resolution of customer escalations, component changes, sustaining engineering, and end-of-life transition issues.
</li><li>Integrate high-speed interfaces such as PCIe Gen5/Gen6, DDR5/DDR6, Intel UPI, AMD xGMI, multi-gigabit Ethernet, advanced VRDs, and common sideband/control buses (SPI, I2C/I3C, GPIO, etc.).
</li><li>Partner with firmware/software, diagnostics, system test/validation, operations, supply chain, and mechanical engineering teams to deliver manufacturable, scalable products ready for cloud-scale deployment.
</li><li>Mentor and support junior engineers, foster cross-team knowledge sharing, and contribute to interviews and talent development initiatives.
</li><li>Participate in thought leadership, innovation, and continuous improvement programs, keeping abreast of trends in server hardware, cloud infrastructure, and AI platforms.
</li><li>Provide technical leadership and hands-on execution through all product life cycle phases - architecture, detailed design, bring-up, debug, validation, production, and sustaining.
</li></ul><p>Success in this role depends on building strong relationships and collaborating on a daily basis with system architects, signal and power integrity engineers, firmware and software developers, CAD and mechanical designers, operations and manufacturing partners, and stakeholders from product management, quality, compliance, and data center operations. Your presence onsite helps ensure real-time teamwork, effective problem-solving, and the alignment required to keep our cutting-edge platforms on schedule and at the highest quality.<br>
</p><p></p><p><b>Skills and Experience
</b></p><p><b>Required:
</b></p><ul><li>Bachelor&rsquo;s degree (or higher) in Electrical Engineering, Computer Engineering, or equivalent; MS or PhD preferred
</li><li>Minimum of 13 years (BS), 11 years (MS), or 9 years (PhD) relevant experience in board-level/electrical hardware engineering for enterprise-class server or high-speed compute platforms
</li><li>Hands-on expertise in:
<ul><li>Schematic capture, board floor planning, and high-performance multi-layer board design for servers or data centers
</li><li>Deep knowledge and real-world application of constraint-driven design, signal integrity, power integrity, and PCB stackup for high-speed buses (PCIe Gen5/6, DDR4/DDR5, UPI/xGMI, etc.)
</li><li>Board bring-up, debug, and validation using oscilloscopes, logic analyzers, and SI/PI equipment
</li><li>Experience with CPU (Intel/AMD/ARM), GPU (Nvidia/AMD), FPGAs, modern VRDs, advanced memory controllers, and high-speed network/storage interconnects
</li><li>Guidance of CAD layout/design teams and detailed design reviews
</li><li>Test plan development, prototype validation, failure/root cause analysis, and board rework
</li><li>Hardware documentation, BOMs, hardware/firmware interface guides, and compliance reports
</li><li>Navigating global safety and EMC regulatory requirements for product certification
</li></ul></li><li>Excellent technical leadership, team collaboration, communication, and mentoring skills
</li></ul><p><b>Preferred </b>:
</p><ul><li>Recent experience with advanced server platforms, including multi-socket x86/ARM, PCIe Gen5/6, DDR5/DDR6
</li><li>Experience bringing server hardware through the full lifecycle: concept, prototype, validation, mass production, and sustaining
</li><li>Experience designing for cloud or large-scale data center environments
</li></ul><p><b>Please include a detailed resume with your application.
</b></p><p>Help us build the hardware foundation for Oracle&rsquo;s next great leap in Cloud and AI!</p></div>

Principal Electrical Engineer

Micross

<div><p>Micross is seeking a <b>Semiconductor Package Design Engineer</b> for our onsite facility in Apopka, Florida.</p><p><b>
Essential Duties and Responsibilities:</b></p><ul><li>
The primarily responsible for design of advanced semiconductor packages, including both ceramic and organic substrates, including layout, parasitic extraction, and optimization</li><li>
Work with IC design, system design, package Signal Integrity (SI)/Power Integrity (PI) &amp; thermal engineering teams to design custom interposer and substrates</li><li>
Work with SoC design teams to optimize die floorplan, bump patterns and interposer / substrate stack up</li><li>
Work with IC design team to define IC package requirements</li><li>
Design package layout using standard CAD tools</li><li>
Extract package parasitics and conduct PI/SI analysis</li><li>
Documentation and release in appropriate archival system</li></ul><p><b>
Preferred Knowledge, Skills, And Abilities</b></p><p>
Layout:</p><ul><li>
Allegro Package Designer Plus (APD+) tools for designing the package and generating artwork for fabrication.</li></ul><p>
Analysis:</p><ul><li>
Celsius PowerDC (IR Drop)</li><li>
Sigrity Advanced SI II: Analysis tools for Signal integrity of parallel busses (DDRx) and serial links (PCIe Gen x), including Package and PCB effects</li><li>
Sigrity Advanced PI II: Power Integrity tools (IR drop, Impedance Profile, capacitor optimization) including Package and PCB effects</li></ul><p>
RF / Microwave Design</p><ul><li>
AWR, Momentum and HFSS Software Circuit, system, and EM simulation for RF/microwave product development</li></ul><p><b>
Qualifications</b></p><ul><li>
Bachelors degree in Electrical Engineering, Mechanical Engineering, or other semiconductor packaging related discipline.</li><li>
8 to 10 years of experience in semiconductor packaging design, modeling, and simulations</li><li>
Strong authority on Cadence Allegro Package Designer Plus (APD+)</li><li>
Experience on interposer and substrate layouts and design in advanced package technologies</li><li>
Experience with 2.5D, 3D package design</li><li>
Experience with design teams on floor plan, bump and layout optimization</li><li>
Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated</li><li>
Record of success in cross-functional team environment</li><li>
Good experience with SI/PI tools for package level extraction/simulation</li></ul><p>
 At Micross, our Core Values of integrity, communication, teamwork, quality and execution, self-discipline and accountability are cultivated throughout all levels of the organization. Micross provides a challenging and enjoyable workplace for members and supports the needs of the community.</p><p>
Micross provides competitive benefits including medical, HSA and FSA plans, dental, vision, company paid basic Life Insurance, Employee Assistance Program (EAP), 401k with employer match, paid leave, vacation, holidays, generous tuition assistance, 529 College Savings, Pet insurance, Legal insurance, and a range of well-being programs available.</p><p>
www.Micross.com</p></div><p></p>

Semiconductor Package Design Engineer

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