power modeling engineer

Apple

<div>Do you have a passion for crafting new solutions? As part of our Silicon Engineering group, you will generate ideas and turn them into reality. You will be part of the team responsible for designing state-of-the-art ASICs that are integral to many Apple products. We are looking for an engineer who will work on the modeling of power dissipation of various IPs including AI/ML and the corresponding power rails, peak current requirements and voltage-frequency operating points for upcoming generations of Apple SOCs. This role provides an opportunity to participate in optimization of a variety of leading edge chips for power-efficiency. You will collaborate across many teams including architecture, design, thermals, PMIC and system design to model power and current profiles for various IPs of the SOC, and the voltages-frequency operating points. The job also involves partnering with the lab and silicon characterization/validation and technology teams on correlating the models to the HW data. 
 
Description 
 
Imagine yourself collaborating across many fields, playing a decisive role of getting innovative products to millions of customers! You will have the opportunity to build new insights into silicon optimization, as well as work with a team of hardworking engineers and be involved in HW/model correlation efforts of mobile SoC design. Your main responsibilities will be: 
 
<ul><li>Modeling power dissipation and power delivery,</li></ul> 
<ul><li>Establishing voltages for DVFM states of IPs, including Neural Engines, CPUs, Graphics, compute (AI/ML) accelerators, media IPs, caches and fabric.</li></ul> 
<ul><li>Modeling power dissipation for customer use-cases.</li></ul> 
- Interacting with the Technology team, Silicon Validation, and Product Engineering teams to establish voltage-frequency design points pre- and post- silicon. 
 
<ul><li>Working with the power lab and test teams to correlate models to HW data.</li></ul> 

Preferred Qualifications 
 
Our ideal candidate should have 3+ years relevant experience, programming skills and an understanding of low-power digital design and power fundamentals. You should also have the following: 
 
Understanding of SOC power modeling and current demand. 
 
Understanding of electrical properties of on-die PDN, power gating, package and system power delivery. 
 
Skills in scripting, data analysis and experience with EDA tools. 
 
Understanding of VLSI design flow and CMOS technology. 
 
Extensive background in EE. 
 
Ability to understand and model thermal control loops and throttling mechanisms. 
 
Familiarity with physical design tools for power optimization. 
 
Great teammate and excellent communication skills. 
 
Minimum Qualifications 
 
A minimum of a bachelor's degree in relevant field and a minimum of 10 years of relevant industry experience. 
 
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant . 
 
Pay &amp; Benefits 
 
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $171,600 and $302,200, and your base pay will depend on your skills, qualifications, experience, and location. 
 
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. 
 
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.</div>

SoC Power Modeling Engineer

<div>Do you have a passion for crafting new solutions? As part of our Silicon Engineering group, you will generate ideas and turn them into reality. You will be part of the team responsible for crafting state-of-the-art ASICs that are integral to many Apple products. We are looking for an engineer who will work on the modeling of power dissipation of various IPs and applications, including AI/ML and power modeling at the SOC/system level for Apple products. This role provides an opportunity to participate in optimization of a variety of leading edge chips for power-efficiency. You will collaborate across many teams including architecture, SOC design, and system design. The job also involves partnering with the lab and silicon characterization/validation teams on correlating the models to the silicon data. 
 
Description 
 
The job involves collaborating across many fields and playing a role of getting innovative products to millions of customers. You will have the opportunity to build new insights into silicon optimization, as well as work with architects, silicon design engineers, software developers, and be involved in silicon/model correlation efforts of mobile SoC design. 
 
Your main responsibilities will be: 
 
<ul><li>Modeling power dissipation at the SOC level, including Neural Engines, CPUs, Graphics, compute ( AI/ML) accelerators, media IPs, caches and fabric.</li></ul> 
<ul><li>Modeling power dissipation for customer use-cases.</li></ul> 
<ul><li>Interacting with the System designers, Technology team, Silicon Validation, and Product Engineering teams to define power targets at the SOC level, and the power delivery.</li></ul> 
<ul><li>Working with the power lab and test teams to correlate models to silicon data.</li></ul> 

Preferred Qualifications 
 
We would prefer our SoC Power Spec Engineer to have the following qualifications: 
 
MSEE preferred 
 
Deep knowledge of SOC architecture and power modeling. 
 
Deep understanding of SOC building blocks including CPU, GPU, caches, memory and media IPs 
 
Skills in scripting and data analysis. 
 
Understanding of VLSI design flow and CMOS technology and background in EE. 
 
Ability to understand and model thermal control loops and throttling mechanisms. 
 
Strong teammate with excellent communication skills. 
 
Minimum Qualifications 
 
A minimum of a bachelor's degree in relevant field and a minimum of 10 years of relevant industry experience. 
 
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant . 
 
Pay &amp; Benefits 
 
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $171,600 and $302,200, and your base pay will depend on your skills, qualifications, experience, and location. 
 
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. 
 
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.</div>

SoC Power Spec Engineer

NVIDIA

<div>We are now looking for an Sr. Architecture Energy Modeling Engineer! At NVIDIA, we pride ourselves in having energy-efficient products. We believe that continuing to maintain our products' energy efficiency compared to the competition is key to our continued success. Our team is responsible for researching, developing, and deploying methodologies to help NVIDIA's products become more energy efficient; and is responsible for building energy models that integrate into architectural simulators, RTL simulation, emulation and silicon platforms. Key responsibilities include developing Machine Learning based power models to analyze and reduce power consumption of NVIDIA GPUs.
As a member of the Power Modeling, Methodology and Analysis Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques for NVIDIA's next generation GPUs, CPUs and Tegra SOCs. Your contributions will help us gain early insight into energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.
What you'll be doing:<ul><li>
Work with architects, designers, and performance engineers to develop an energy-efficient GPU.</li><li>
Identify key design features and workloads for building Machine Learning based unit power/energy models.</li><li>
Develop and own methodologies and workflows to train models using ML and/or statistical techniques.</li><li>
Improve the accuracy of trained models by using different model representations, objective functions, and learning algorithms.</li><li>
Develop methodologies to estimate data movement power/energy accurately.</li><li>
Correlate the predicted energy from models built at different stages of the design cycle, with the goal of bridging early estimates to silicon.</li><li>
Work with performance infrastructure teams to integrate power/energy models into their platforms to enable combined reporting of performance and power for various workloads.</li><li>
Develop tools to debug energy inefficiencies observed in various workloads run on silicon, RTL, and architectural simulators. Identify and suggest solutions to fix the energy inefficiencies.</li><li>
Prototype new architectural features, build an energy model for those new features, and analyze the system impact.</li><li>
Identify, suggest, and/or participate in studies for improving GPU perf/watt.</li></ul>
What we need to see:<ul><li>
MS (or equivalent experience) with proven experience or PhD in related fields.</li><li>
6+ years of experience.</li><li>
Strong coding skills, preferably in Python, C++.</li><li>
Background in machine learning, AI, and/or statistical modeling.</li><li>
Background in computer architecture and interest in energy-efficient GPU designs.</li><li>
Familiarity with Verilog and ASIC design principles is a plus.</li><li>
Ability to formulate and analyze algorithms, and comment on their runtime and memory complexities.</li><li>
Basic understanding of fundamental concepts of energy consumption, estimation, and low power design.</li><li>
Desire to bring quantitative decision-making and analytics to improve the energy efficiency of our products.</li><li>
Good verbal/written communication and interpersonal skills.</li></ul>
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.<div><div><div><div><div><div><div>
You will also be eligible for equity and benefits.</div></div></div></div></div></div></div>
Applications for this job will be accepted at least until April 14, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.</div>

Senior Architecture Energy Modeling Engineer

<div>As part of our Silicon Engineering group, you will take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you will help design products that bring to our customers experiences they&rsquo;ve never before envisioned. In this highly visible role, you will be responsible for SOC power optimization automation, power modeling, and simulation. 
 
Description 
 
The main responsibility of this role is to drive the automation for SOC power optimization. 
 
<ul><li>Working with SOC power team members to automate the power analysis and optimization tasks</li></ul> 
<ul><li>Explore new methodology to analyze the power data, create power metrics to identify the optimization opportunities, drive automated approach to improve SOC power efficiency across IPs</li></ul> 
<ul><li>Explore machine learning approaches to optimize SOC power, work with team members on training data preparation, research ML based solution for power simulation, optimization and modeling.</li></ul> 
<ul><li>Collaborate cross-functional teams to deploy the power optimization automation to improve SOC power, review results, improve the methodology on efficiency, runtime, and support boarder scope of designs.</li></ul> 

Preferred Qualifications 
 
MSEE preferred 
 
Familiarity with machine learning algorithms and programming 
 
Familiarity with scripting in Python. 
 
Familiarity with ASIC power analysis and optimization 
 
Familiarity with SOC design flow and methodology 
 
Familiarity with Verilog and System Verilog. 
 
Familiarity computer architecture, logic and circuits design 
 
Familiarity signal processing is a plus 
 
Silicon power measurement experience is a plus 
 
SOC power modeling, low power design and power optimization experience is a plus 
 
Strong communication skills are a pre-requisite as the candidate will interface with a lot of different groups 
 
Minimum Qualifications 
 
A minimum of a bachelor's degree in relevant field and a minimum of 10 years of relevant industry experience. 
 
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant . 
 
Pay &amp; Benefits 
 
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $171,600 and $302,200, and your base pay will depend on your skills, qualifications, experience, and location. 
 
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. 
 
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.</div>

SoC Power Analysis and Optimization Engineer

<div>As part of our Silicon Engineering group, you will take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you will help design products that bring to our customers experiences they&rsquo;ve never before envisioned. In this highly visible role, you will be responsible for SOC power optimization automation, power modeling, and simulation. 
 
Description 
 
The main responsibility of this role is to drive the automation for SOC power optimization. 
 
<ul><li>Working with SOC power team members to automate the power analysis and optimization tasks</li></ul> 
<ul><li>Explore new methodology to analyze the power data, create power metrics to identify the optimization opportunities, drive automated approach to improve SOC power efficiency across IPs</li></ul> 
<ul><li>Explore machine learning approaches to optimize SOC power, work with team members on training data preparation, research ML based solution for power simulation, optimization and modeling.</li></ul> 
<ul><li>Collaborate cross-functional teams to deploy the power optimization automation to improve SOC power, review results, improve the methodology on efficiency, runtime, and support boarder scope of designs.</li></ul> 

Preferred Qualifications 
 
MSEE preferred 
 
Familiarity with machine learning algorithms and programming 
 
Familiarity with scripting in Python. 
 
Familiarity with ASIC power analysis and optimization 
 
Familiarity with SOC design flow and methodology 
 
Familiarity with Verilog and System Verilog. 
 
Familiarity computer architecture, logic and circuits design 
 
Familiarity signal processing is a plus 
 
Silicon power measurement experience is a plus 
 
SOC power modeling, low power design and power optimization experience is a plus 
 
Strong communication skills are a pre-requisite as the candidate will interface with a lot of different groups 
 
Minimum Qualifications 
 
A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience. 
 
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant . 
 
Pay &amp; Benefits 
 
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $139,500 and $258,100, and your base pay will depend on your skills, qualifications, experience, and location. 
 
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. 
 
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.</div>

<div>As part of our Silicon Engineering group, you will take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you will help design products that bring to our customers experiences they&rsquo;ve never before envisioned. In this highly visible role, you will be responsible for SOC power optimization automation, power modeling, and simulation. 
 
Description 
 
The main responsibility of this role is to drive the automation for SOC power optimization. 
 
<ul><li>Working with SOC power team members to automate the power analysis and optimization tasks</li></ul> 
<ul><li>Explore new methodology to analyze the power data, create power metrics to identify the optimization opportunities, drive automated approach to improve SOC power efficiency across IPs</li></ul> 
<ul><li>Explore machine learning approaches to optimize SOC power, work with team members on training data preparation, research ML based solution for power simulation, optimization and modeling.</li></ul> 
<ul><li>Collaborate cross-functional teams to deploy the power optimization automation to improve SOC power, review results, improve the methodology on efficiency, runtime, and support boarder scope of designs.</li></ul> 

Preferred Qualifications 
 
MSEE preferred 
 
Familiarity with machine learning algorithms and programming 
 
Familiarity with scripting in Python. 
 
Familiarity with ASIC power analysis and optimization 
 
Familiarity with SOC design flow and methodology 
 
Familiarity with Verilog and System Verilog. 
 
Familiarity computer architecture, logic and circuits design 
 
Familiarity signal processing is a plus 
 
Silicon power measurement experience is a plus 
 
SOC power modeling, low power design and power optimization experience is a plus 
 
Strong communication skills are a pre-requisite as the candidate will interface with a lot of different groups 
 
Minimum Qualifications 
 
A minimum of a bachelor's degree in related field 
 
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant . 
 
Pay &amp; Benefits 
 
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $126,800 and $190,900, and your base pay will depend on your skills, qualifications, experience, and location. 
 
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. 
 
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.</div>

<div>Do you have passion to join a world-class Digital Design Engineering group and take imaginative and revolutionary ideas and determine how to turn them into reality! You will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking and groundbreaking ideas to the real world. You&rsquo;ll help design the tools that allow us to bring customers experiences they&rsquo;ve never-before envisioned. We have an extraordinary opportunity for Standard Cell Design Methodology and Flow Engineers. In this highly visible role, you will be at the heart of a processor design effort, working with the custom digital circuits team and library development, making a critical impact in delivering quality products to market quickly. 
 
Description 
 
Imagine yourself at the center of our cutting-edge processor design in deep submicron technologies, and on standard cell library designs. You will have the opportunity to integrate and come-up with new insights, as well as work with a team of talent engineers. In this role on our custom circuits team, you will: 
 
<ul><li>Be the interface to internal CAD team for planning production flows and with foundry on PDK requirements.</li></ul> 
<ul><li>Collaborate with technology team on new process requirements and work with design/CAD team to enable relevant tools/flows</li></ul> 
<ul><li>Implement sophisticated digital block in Verilog/SystemVerilog, run simulations or formal check for verification.</li></ul> 
<ul><li>Use data analysis techniques and/or sophisticated Machine Learning models to study the circuit trends in timing, power, and area, and to potentially detect quality issues in large datasets.</li></ul> 

Preferred Qualifications 
 
At least 5+ years in Library Characterization, Timing/Power/CCS Noise/Variation Modeling, Liberty Formats, Spice simulation, Static Timing and Power Analysis flows, etc. 
 
Experience with timing modeling of large custom macros and complex sequential flops. 
 
Exposure to Design For Test, scan concept and write DFT friendly RTL 
 
Understands all aspects of implementation specification, design, timing, power, and flow automation. 
 
Data analysis and ML knowledge to study data trend and perform QA on big dataset with automation 
 
Flow automation skills in standard cells development and integration to improve execution efficiency. Experience of using Python/TCL/Perl 
 
Knowledge of FE modeling/Verilog and/or VHDL, and experience with various EDA tools for characterization, synthesis, place-route, Verilog simulation, spice simulation, formal verification, DRC/LVS, RC extraction and/or library characterization. 
 
Proven understanding of device physics and process. 
 
Familiar with foundry ecosystem and benchmarking practice. 
 
Minimum Qualifications 
 
BS and a minimum of 10 years of relevant industry experience 
 
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant . 
 
Pay &amp; Benefits 
 
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $163,300 and $290,100, and your base pay will depend on your skills, qualifications, experience, and location. 
 
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. 
 
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.</div>

Standard Cell Design Methodology & Flow Engineer

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