verification engineer

<div>Overview:
<div><b>
WHAT YOU DO AT AMD CHANGES EVERYTHING</b></div><div>
At AMD, our mission is to build great products that accelerate next-generation computing experiences&mdash;from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you&rsquo;ll discover the real differentiator is our culture. We push the limits of innovation to solve the world&rsquo;s most important challenges&mdash;striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. <b>Together, we advance your career.</b></div>
Responsibilities:
<div><b>
Verification Engineer</b></div><div></div><div><b><br>
THE ROLE:</b></div><div>
We are currently looking for Lead ASIC Verification Engineers who will be involved in all aspects of AMD's next generation Data center network products. This includes verifying designs using the latest UVM standard and developing comprehensive test plans to ensure coverage closure. The position allows exposure to all aspect of ASIC design stages.</div><div></div><div><br>
Our products are aimed at making Data Centre Networking solutions more effective. This is a highly strategic and important part of AMD&rsquo;s business, targeting a set of customers that includes the most successful internet and cloud companies in the world.</div><div></div><div><br>
Successful candidate will lead the verification effort and work alongside an experienced design and architecture teams and will thus have enormous opportunities for learning and self-development. The position is likely to require some travel.</div><div></div><div><b><br>
THE PERSON:</b></div><ul><li>
Creative innovator and thinker who loves technical problems and detail-oriented tasks</li><li>
Exhibits relentless commitment to help the team meet quality and development goals on schedule with high quality</li><li>
Drives to learn and perform at their highest potential in a technical capacity</li><li>
Thrives in both a team environment and in individual contribution.</li><li>
Able to lead a small team of engineers working towards a common objective</li><li>
Able to learn independenly and acquire new skills required for the job</li><li>
Communicates openly and clearly in meetings, presentations, emails, and reports</li></ul><div></div><div><b><br>
KEY RESPONSIBILITIES:</b></div><ul><li>
Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified</li><li>
Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases</li><li>
Estimate the time required to write the new feature tests and any required changes to the test environment</li><li>
Build the directed and random verification tests</li><li>
Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues</li><li>
Review functional and code coverage metrics &ndash; modify or add tests or constrain random tests to meet the coverage requirements</li></ul><div></div><div><b><br>
PREFERRED EXPERIENCE:</b></div><ul><li>
Proficient in IP level ASIC verification</li><li>
Proficient in debugging firmware and RTL code using simulation tools</li></ul><ul><li>
Proficient in developing UVM/SV testbenches</li><li>
Experienced with Verilog, System Verilog, C, and C++</li><li>
Experience with PCIe and/or Ethernet protocols</li><li>
Automating workflows in a distributed compute environment.</li></ul><ul><li>
Exposure to simulation profile, efficiency improvement, acceleration</li><li>
Scripting language experience: Python, Ruby, Makefile, shell preferred.</li></ul><ul><li>
Exposure to leadership or mentorship is an asset</li><li>
Desirable assets with prior exposure to network processors.</li></ul><div></div><div><b><br>
ACADEMIC CREDENTIALS:</b></div><ul><li>
Bachelors or Masters degree in computer engineering/Electrical Engineering</li></ul>
Qualifications:
<div><i>
Benefits offered are described: </i>AMD benefits at a glance.</div><div></div><div><i><br>
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants&rsquo; needs under the respective laws throughout all stages of the recruitment and selection process.</i></div></div>

Verification Engineer

CoMira Solutions PK

<p><b>CoMira Solutions is Hiring &ndash; Senior Verification/Design Engineer</b></p><p>We&rsquo;re looking for a <b>hands-on engineer</b> with expertise in <b>digital ASIC verification</b> using <b>SystemVerilog/UVM</b>.</p><p><b>Key Responsibilities:</b></p><ul><li>Develop and verify RTL design implementations</li><li>Build UVM environments, test benches &amp; verification components</li><li>Plan, implement &amp; analyze functional coverage</li><li>Debug verification environments &amp; recreate field issues</li><li>Work with protocols like <b>Ethernet (802.3), PCIe, CXL</b>, and security algorithms</li></ul><p><b>Requirements:</b></p><ul><li>3&ndash;5 years of relevant experience</li><li>Strong in <b>SystemVerilog, UVM, scripting (Perl/Python/Shell)</b></li><li>Familiar with <b>QuestaSim, VCS, or Cadence Incisive</b></li><li><b>Bachelors/Masters</b> in Electrical or Computer Engineering</li></ul><p><b>How to Apply:</b> Send your resume to <b>Huma.asif@comira.pk</b></p><p>Job Type: Full-time</p><p>Work Location: In person</p>

Design Verification Engineer

Intel Corporation

<div><h1 class="jobSectionHeader"><b>Job Details:
</b></h1><p></p><h2 class="jobSectionHeader"><b>Job Description:
</b></h2><p>Join Intel's Silicon Engineering Group as a CPU Verification Engineer and play a critical role in ensuring the functional correctness and performance of next-generation processor designs. You will be responsible for developing and executing comprehensive verification strategies for complex CPU architectures that power millions of devices worldwide.
</p><p></p><p><b>Job Responsibilities
</b></p><ul><li>Develop and execute comprehensive verification plans to validate CPU logic against architectural specifications.
</li><li>Build scalable UVM-based test benches and define robust functional coverage models.
</li><li>Run system-level simulations to uncover design bugs and ensure functional integrity.
</li><li>Debug and root-cause issues in the pre-silicon environment; implement corrective actions to resolve test failures.
</li><li>Collaborate closely with CPU architects and RTL designers to verify complex architectural and microarchitectural features.
</li><li>Document verification strategies and lead technical reviews with design and architecture teams.
</li><li>Maintain and enhance existing verification infrastructure and methodologies.
</li><li>Contribute to the definition and refinement of CPU architecture and microarchitecture features.
</li></ul><p></p><p><b>Verification Planning &amp; Strategy
</b></p><ul><li>Develop comprehensive verification plans for CPU subsystems including cores, caches, memory controllers, and interconnects.
</li><li>Define coverage metrics and verification closure criteria.
</li><li>Collaborate with design teams to understand architectural specifications and implementation details.
</li></ul><p></p><p><b>Test Development &amp; Execution
</b></p><ul><li>Create directed and random test scenarios using SystemVerilog, UVM, and proprietary verification methodologies.
</li><li>Develop and maintain testbench infrastructure and verification IP.
</li><li>Debug complex functional and timing issues across multiple abstraction levels.
</li><li>Execute regression testing and analyze coverage reports.
</li></ul><p></p><p><b>Methodology &amp; Tools
</b></p><ul><li>Utilize industry-standard EDA tools.
</li><li>Implement constrained random verification environments.
</li><li>Develop and enhance verification automation scripts and flows.
</li></ul><p></p><div><p><b>Collaboration &amp; Communication
</b></p><ul><li>Work closely with CPU architects, RTL designers, and physical design teams.
</li><li>Participate in design reviews and provide verification feedback.
</li><li>Document verification results and present findings to cross-functional teams.
</li></ul><p></p><p><b>Core Competencies
</b></p><ul><li>Strong analytical and problem-solving skills.
</li><li>Excellent debugging capabilities for complex digital systems.
</li><li>Understanding of timing analysis and low-power design concepts.
</li></ul></div><p></p><h2 class="jobSectionHeader"><b>Qualifications:
</b></h2><p>You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, and internships experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
</p><p></p><p><b>Minimum Qualifications
</b></p><ul><li>Bachelor's degree in Electrical/Electronics Engineering, Computer Engineering or in a STEM related field of study with 3+ years of experience.
</li><li>Experience developing SystemVerilog in UVM-based test-benches for reusable and scalable verification environments.
</li><li>Experience in scripting language (i.e. Python or Perl).
</li><li>Experience in C++.
</li><li>Experience implementing validation strategies based on architectural and design feature changes.
</li></ul><p></p><p><b>Preferred Qualifications
</b></p><ul><li>Post Graduate degree in Electrical/Electronics Engineering, Computer Engineering or in a STEM related field of study with 2+ years of industry experience.
</li><li>Solid understanding of digital logic design, including instruction set execution, ALUs, control units, registers, memory, and system buses.
</li><li>Experience with Synopsys simulators.
</li><li>Experience with agile development methodologies.</li><br>
</ul><p></p><h2 class="jobSectionHeader"><b>Job Type:
</b></h2>Experienced Hire
<p></p><h2 class="jobSectionHeader"><b>Shift:
</b></h2>Shift 1 (United States of America)
<p></p><h2 class="jobSectionHeader"><b>Primary Location:
</b></h2>US, Texas, Austin
<p></p><h2 class="jobSectionHeader"><b>Additional Locations:
</b></h2><p></p><h2 class="jobSectionHeader"><b>Business group:
</b></h2>The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel&rsquo;s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
<p></p><h2 class="jobSectionHeader"><b>Posting Statement:
</b></h2>All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
<h2 class="jobSectionHeader"><b>Position of Trust
</b></h2>N/A
<p></p><p><b>Benefits:
</b></p><p></p><p>We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
</p><p>https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003<br>
</p><p></p>Annual Salary Range for jobs which could be performed in the US:<br>
<p></p>$104,890.00-197,230.00 USD<br>
<p></p>The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.<br>
<p></p><p><b>Work Model for this Role
</b></p>This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.</div>

CPU Verification Engineer

<div>Overview:
<div><b>
WHAT YOU DO AT AMD CHANGES EVERYTHING</b></div><div>
At AMD, our mission is to build great products that accelerate next-generation computing experiences&mdash;from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you&rsquo;ll discover the real differentiator is our culture. We push the limits of innovation to solve the world&rsquo;s most important challenges&mdash;striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. <b>Together, we advance your career.</b></div>
Responsibilities:
<div><b>
SOC Verification Design Engineer</b></div><div><br>
</div><div><b>THE ROLE:</b></div><div>
The focus of this role is to plan, build, and execute the verification of new and existing features for AMD&rsquo;s graphics processor IP, resulting in no bugs in the final design.</div><div></div><div><b><br>
THE PERSON:</b></div><div>
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.</div><div></div><div><b><br>
KEY RESPONSIBILITIES:</b></div><ul><li>
Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified</li><li>
Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases</li><li>
Estimate the time required to write the new feature tests and any required changes to the test environment</li><li>
Build the directed and random verification tests</li><li>
Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues</li><li>
Review functional and code coverage metrics &ndash; modify or add tests or constrain random tests to meet the coverage requirements</li></ul><div></div><div><b><br>
PREFERRED EXPERIENCE:</b></div><ul><li>
Proficient in IP level ASIC verification with 7+years of experience</li><li>
Proficient in debugging firmware and RTL code using simulation tools</li></ul><ul><li>
Proficient in using UVM testbenches and working in Linux and Windows environments</li><li>
Experienced with Verilog, System Verilog, C, and C++</li><li>
Graphics pipeline knowledge</li><li>
Developing UVM based verification frameworks and testbenches, processes and flows</li><li>
Automating workflows in a distributed compute environment.</li></ul><ul><li>
Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process</li><li>
Strong background in the C++ language, preferably on Linux with exposure to Windows platform</li><li>
Good understanding and hands-on experience in the UVM concepts and SystemVerilog language</li><li>
Good working knowledge of SystemC and TLM with some related experience.</li><li>
Scripting language experience: Perl, Ruby, Makefile, shell preferred.</li></ul><ul><li>
Exposure to leadership or mentorship is an asset</li><li>
Desirable assets with prior exposure to video codec system or other multimedia solutions.</li></ul><div></div><div><b><br>
ACADEMIC CREDENTIALS:</b></div><ul><li>
Bachelors or Masters degree in computer engineering/Electrical Engineering</li></ul><p></p><p><br>
#LI-SG</p>
Qualifications:
<div><i>
Benefits offered are described: </i>AMD benefits at a glance.</div><div></div><div><i><br>
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants&rsquo; needs under the respective laws throughout all stages of the recruitment and selection process.</i></div></div>

SOC Verification Engineer

Tata Consultancy Services (TCS)

<div></div><div><div><div><div><p>Job Role: VLSI Design Verification Engineer</p>
<p>Required Skill: SystemVerilog, VLSI DV</p>
<p>Experience: 4-7 years<br>
Location: Hyderabad/ Bangalore<br>
Must Have Skill:
</p><ul><li>3+ years Design Verification experience in SystemVerilog / C++</li>
<li>Experience in test planning and debugging complex designs</li>
<li>Full silicon design lifecycle experience</li>
<li>Strong background in developing UVM Testbenches from scratch</li>
<li>Deep understanding of Computer Architecture</li></ul><br>
<div>
</div><p>Good To Have: Experience with caches and memory subsystems
</p><p>Roles &amp; Responsibility : Job requires experience in VLSI DV skills.</p>
</div></div></div><div><div><div><b>Location</b></div>
<div>Hyderabad</div>
</div><div><div><b>Job Function</b></div>
<div>TECHNOLOGY</div>
</div><div><div><b>Role</b></div>
<div>Engineer</div>
</div><div><div><b>Job Id</b></div>
<div>374256</div>
</div><div><div><b>Desired Skills</b></div>
<div>VLSI</div>
</div></div><p>Desired Candidate Profile
</p><div><div><b>Qualifications</b> : BACHELOR OF ENGINEERING</div></div></div><div></div>

VLSI Design Verification Engineer

Analog Devices

<div><div>Come join Analog Devices (ADI) &ndash; a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare.</div><div></div><div>
ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future.</div><div></div><div>
About Analog Devices</div><div>
Analog Devices, Inc. (NASDAQ: <div>ADI</div> ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible&trade;. Learn more at <div>www.analog.com</div> and on <div>LinkedIn</div> and <div>Twitter (X)</div>.</div><div></div><div><div><div><br>
Verification Engineer</div></div><div></div><div><div><br>
The ATE Group is currently seeking a motivated Verification Engineer for the IC development of new products. Products in this strategy are comprised of integrated high speed and precision signal chains targeted towards Automated Test Equipment (ATE) applications. Product designs utilize both advanced internal BiCMOS SiGe processes as well as standard 0.18um CMOS processes and fine line CMOS processes. These designs are then combined on a laminate package to provide a custom SIP (System In a Package) solution otherwise known as a chiplet.</div></div><div><div>
The candidate&rsquo;s responsibilities will include system level verification of the products including simulation of digital and mixed signal circuits including high speed drivers and receivers, DACs, SPI interfaces, calibration routines and digital controls. This is a multi-die verification effort utilizing both Verilog and spice simulators. A Verification plan will be created at the product start determining the verification methods to be utilized and the block model plans. Duties also include working with evaluation engineers to compare and contrast simulation and lab results. The ideal candidate is a self-motivated individual and fast learner with strong technical, analytical and communication skills. The candidate will have the opportunity to learn system level design experience, work with newly developed internal BiCMOS processes and collaborate closely with an experienced development team.</div></div><div><div>
Job responsibilities will include, but are not limited to, the following:</div></div><div><ul><li><div>
Develop test bench environments and directed functional, random, and constrained random tests. Implement coverage driven verification methodologies. Create functional coverage metrics. Ensure these environments allow verification, design, product, and test engineers to efficiently develop functional test cases.</div></li></ul></div><div><ul><li><div>
Define and develop block level modeling and verification strategies based on design requirements and architecture</div></li></ul></div><div><ul><li><div>
Specify, and perform as necessary, block and chip level RTL, gate, and mixed signal co-simulation regressions. Track progress against verification plan</div></li></ul></div><div><ul><li><div>
Work with designers and product/apps engineers to achieve functional coverage goals and to debug the design and environment</div></li></ul></div><div><ul><li><div>
Participate in project meetings</div></li></ul></div><div><div>
Qualifications:</div></div><div><ul><li><div>
Minimum requirement of BSEE</div></li></ul></div><div><ul><li><div>
Knowledge of Analog circuits and CAD tools (Cadence Virtuoso).</div></li></ul></div><div><ul><li><div>
Ability to problem solve at the circuit and system level</div></li></ul></div><div><ul><li><div>
Good presentation and writing/communication skills.</div></li></ul></div></div><div><div><ul><li><div>
Ability to collaborate in a team environment and across organizations</div></li></ul></div></div><div></div><div><i>
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position &ndash; except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) &ndash; may have to go through an export licensing review process.</i></div><div></div><div><i>
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.</i></div><div></div>
Job Req Type: Graduate Job<br>
<div></div>
Required Travel: Yes, 10% of the time</div><div></div>

Engineer, Design Verification Engineer

NVIDIA

<div><div><p>NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel.</p></div><p></p><p>
We are now looking to hire strong performance verification engineers with a sharp understanding of CPU and memory architecture. NVIDIA makes some of the fastest CPUs in the world and is solving problems, with its vast arsenal of CPUs, GPUs and SW, in areas such as High-performance computing, Automated driving, Medical imaging and much more! We are seeking highly motivated engineers to join this dynamic and innovative team that owns performance alignment of CPUs and CPU fabrics made by NVIDIA! Do you want to be part of the team that explores and defines the next generation of CPUs?</p><p></p><div><div><div><div><div><div><div><div><div><p><b>
What will you be doing:</b></p><ul><li><p>
Responsibilities will include development of test plans and strategies, develop simulation environments, system bring-up, validation, and automation to deliver best-in-class CPUs.</p></li><li><p>
Develop and maintain CPU simulator infrastructure, hardware CPU test and performance infrastructure.</p></li><li><p>
Analyze and validate CPU and fabric performance, helping to understand current, and guide the development of future CPU products.</p></li><li><p>
Definition and development of tool chain and workflows that enables the full system performance alignment.</p></li><li><p>
Silicon based competitive analysis of NVIDIA CPUs.</p></li></ul><p></p><p><b>
What we need to see:</b></p><ul><li><p>
Master's or Bachelor's degree in EE/CS or equivalent experience</p></li><li><p>
5+ years of experience preferably in the areas of CPU / SOC Performance Verification and Analysis</p></li><li><p>
Strong understanding of computer system architecture and operating system fundamentals.</p></li><li><p>
Hands-on experience with HDLs such as Verilog / System Verilog.</p></li><li><p>
Knowledge of verification methodologies and tools for IP and SoC level verification.</p></li><li><p>
Experience with System Verilog, C/C++, Python languages and relevant frameworks.</p></li><li><p>
Background with debug on Silicon.</p></li></ul><p></p><p>
 <b>Ways to stand out from the crowd:</b></p><ul><li><p>
Detailed knowledge of the ARM and/or x-86 architecture.</p></li><li><p>
Prior experience with performance analysis of CPUs.</p></li><li><p>
Experience with analysis and characterization of CPU workloads.</p></li></ul><p></p><p>
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.</p><p></p><p>
#LI-Hybrid</p></div></div></div></div></div></div></div></div></div></div><p></p>

Senior Verification Engineer, Performance

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