SoC ATPG Engineer

Job Title: SoC ATPG Engineer

Key Responsibilities

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  Develop and implement ATPG (Automatic Test Pattern Generation) for complex SoC designs.

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  Perform DFT pattern generation, fault simulation, and coverage analysis.

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  Work closely with DFT and verification teams to improve test coverage and quality.

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  Debug ATPG patterns and support silicon bring-up and test activities.

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  Optimize test methodologies to enhance efficiency and reduce test time.

Required Skills

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  Strong hands-on experience in SoC-level ATPG and fault coverage improvement.

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  Proficiency in DFT tools such as Synopsys TetraMAX, Cadence Modus, or equivalent.

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  Good understanding of DFT architectures — scan insertion, MBIST, JTAG, boundary scan.

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  Familiarity with STA, synthesis, and RTL design flows.

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  Excellent problem-solving and debugging skills.