Qualification & Experience:
- PhD / MS in Electrical Engineering, Computer Engineering or relevant discipline.
Publications:
- The candidates must have publications as per HEC criteria for faculty appointments.
Key Responsibilities:
- Leading & implementing chip-design projects with the design team.
- Establishing a robust chip-design training ecosystem including content design, execution, exit testing, reporting etc. to boost skilled workforce in this domain.
- Collaborating with other similar setups and faculty to enhance outcomes.
Knowledge/Skills/Abilities:
- Strong analytical and problem-solving skills.
- Excellent communication, presentation, reporting and collaboration skills.
- The ideal candidate will have academic / industrial experience in chip design and tape-outs and be able to train and mentor students in this domain.
Terms & Conditions:
- Candidates are required to attach scanned copies of their documents (Academics /Professional).
- Last education certificate/degree must be attested/verified by HEC.
Candidates may be considered ineligible for the post due to any of the following reasons:
- 3rd Div in academic career / weak academic profile.
- In process of pursuing a required degree.
- Only selected candidates will be contacted and issued offer letter.
- Candidates serving in Govt departments, Armed forces may apply after seeking NOC from their respective parent department / organizations.
- Late / incomplete applications will be ignored.
- Only short-listed candidates will be considered / called for test / interview and no TA / DA will be admissible.
- NUST reserves the right to cancel, modify / terminate the recruitment program due to any reason, without notice, at any time.