Qualification & Experience:
- PhD in Electrical Engineering, Computer Engineering, or a relevant discipline.
- 10 years of experience in chip design, including significant leadership roles.
Publications:
- The candidates must have publications as per HEC criteria for faculty appointments.
Key Responsibilities:
- Working collaboratively with academic and industry partners to drive innovation and excellence in chip design and verification.
- Spearheading research initiatives and fostering partnerships with industry to advance cutting-edge developments in chip design, contributing to the global knowledge base and technology advancements.
- Leading and overseeing complex chip design projects with the design group, ensuring the highest standards of quality and innovation.
Knowledge/Skills/Abilities:
- Exceptional analytical, problem-solving, and strategic thinking skills.
- Outstanding communication, presentation, reporting, and collaboration skills.
- The ideal candidate will have extensive academic and/or industrial experience in chip design, tape-outs, and leadership roles, with the ability to train, mentor, and lead advanced research in this domain
Terms & Conditions:
- Candidates are required to attach scanned copies of their documents (Academics /Professional).
- Last education certificate/degree must be attested/verified by HEC.
Candidates may be considered ineligible for the post due to any of the following reasons:
- 3rd Div in academic career / weak academic profile.
- In process of pursuing a required degree.
- Only selected candidates will be contacted and issued offer letter.
- Candidates serving in Govt departments, Armed forces may apply after seeking NOC from their respective parent department / organizations.
- Late / incomplete applications will be ignored.
- Only short-listed candidates will be considered / called for test / interview and no TA / DA will be admissible.
- NUST reserves the right to cancel, modify / terminate the recruitment program due to any reason, without notice, at any time.