PCB layout engineer

LTTS India

Chennai

PCB Layout process flow, Library development and validation; Schematic capture; Part Placement; Constraints setting Electrical/DFA/DFM; Power split plan; Routing; Controlled impedance Length tuning & Post Gerber process
HDI Techniques; Blind / Buried VIA; High speed interface peripherals; DFX guidelines & Validation; SI/PI guidelines & validation; Layer stack-up define & Calculation.

PCB Layout process flow, Library development and validation; Schematic capture; Part Placement; Constraints setting Electrical/DFA/DFM; Power split plan; Routing; Controlled impedance Length tuning & Post Gerber process HDI Techniques; Blind / Buried VIA; High speed interface peripherals; DFX guidelines & Validation; SI/PI guidelines & validation; Layer stack-up define & Calculation.