physical design engineer

Intel Corporation

<div><h1 class="jobSectionHeader"><b>Job Details:
</b></h1><p></p><h2 class="jobSectionHeader"><b>Job Description:
</b></h2><ul><li>Performs physical design integration of custom GPU designs (Gfx, Media and SOC) and Layout verification, reviews at various milestones and gives timely feedback to all cross domains like Floorplan/RDL/PDN/Clock.
</li><li>Responsible for making the blocks Tape in quality with timely fixes and correct by construction approach.
</li></ul><p></p><h2 class="jobSectionHeader"><b>Qualifications:
</b></h2>B.E., B.Tech., M. Tech.<p><br>
</p><p></p><h2 class="jobSectionHeader"><b>Job Type:
</b></h2>Intel Contract Employee
<p></p><h2 class="jobSectionHeader"><b>Shift:
</b></h2>Shift 1 (India)
<p></p><h2 class="jobSectionHeader"><b>Primary Location:
</b></h2>India, Bangalore
<p></p><h2 class="jobSectionHeader"><b>Additional Locations:
</b></h2><p></p><h2 class="jobSectionHeader"><b>Business group:
</b></h2>The Software and AI (SAI) Team drives customer value by enabling differentiated experiences through leadership AI technologies and foundational software stacks, products, and services. The group is responsible for developing the holistic strategy for client and data center software in collaboration with OSVs, ISVs, developers, partners and OEMs. The group delivers specialized NPU IP to enable the AI PC and GPU IP to support all of Intel's market segments. The group also has HW and SW engineering experts responsible for delivering IP, SOCs, runtimes, and platforms to support the CPU and GPU/accelerator roadmap, inclusive of integrated and discrete graphics.
<p></p><h2 class="jobSectionHeader"><b>Posting Statement:
</b></h2>All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
<h2 class="jobSectionHeader"><b>Position of Trust
</b></h2>N/A
<p></p><p><b>Work Model for this Role
</b></p>This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.</div>

Physical Design Engineer

Source-Right Inc.

<div><div><p><b>Position: Senior VCLP &amp; Physical Design Engineer (SI50FT RM 3657)</b></p>
<p><b>Professional Summary :</b></p>
<ul><p>Senior VCLP &amp; Physical Design Engineer with 5+ Years of Experience.</p>
<p>An accomplished engineering professional possesses expertise in VCLP And physical design implementation at lower tech nodes with high performance , Multi voltage design, place &amp; route, Power Opt, STA, physical verification and performance management. Skilled in determining the functional processes necessary to meet organizational goals; facilitating successful people management, and operations, and identifying trends Physical Design Implementation.</p>
<p>A career-motivated and passionate individual with solid experience in the areas of VCLP and<br>
physical design, floor planning, formal verification, automation, and root cause analysis.</p>
<p>Expertise in VCLP and physical design implementation on lower tech nodes such as 8nm, 4nm, 7nm, 10nm, and 14nm using Synopsys ICC2 and FC EDA tools.</p>
<p>Results-oriented versatile leader specializing in shaping high-performing cultures with progressive management, prolific communications, &amp; robust development of process.</p>
<p>People manager and a natural motivator, driven by strong professional and personal values and an ability to influence without authority.</p>
<p>Focused and goal-oriented professional willing to add value to the existing process all the time; additional capabilities of critical thinking, planning, and overall management.</p>
<p>Proficient in adhering to quality and well versed in understanding expectations from the work and later delivering best while ensuring results meeting above expectations.</p>
<p>Successful portfolio with participative nature for the overall growth of the organization by planning and executing a variety of tasks including management, analysis, coordination, and maintaining work-related documents.</p>
<p>A keen planner with skills in conceptualizing and effecting process initiatives to enhance efficiency and quality.</p>
<p>Amid-management professional desiring to get instrumental in the comprehensive overall growth of the organization while refining present standards of skills, knowledge, and efficiency</p>
</ul>
<p><b>TOOL SKILLS</b><br>
&#61692; VC STATIC<br>
&#61692; ICC2<br>
&#61692; FC compiler<br>
&#61692; Cadence<br>
&#61692; CALIBRE<br>
&#61692; CHEETHA 2 FLOW</p>
<p><b>Core Competencies :</b><br>
VCLP-Low Power Cells Physical Design concepts Performance Management<br>
Place and Route Static timing analysis(ECO) Iso cells, LS ,Retention cells<br>
DRC/LVS/LEC STA Concepts PSW cells</p>
<p><b>*******************************************************************************************************************************************</b></p>
</div>
<div><div><div><div><b>Job Category: </b>Others
</div><div><b>Job Type: </b>Full Time
</div><div><b>Job Location: </b>Bangalore
</div><div><b>Experience: </b>5+ years
</div><div><b>Notice period: </b>0-30 days</div></div></div></div></div>

Senior VCLP & Physical Design Engineer (SI50FT RM 3657)

Qualcomm

<div><h2 class="jobSectionHeader"><b>Company:</b></h2>
Qualcomm Technologies, Inc.<p></p><h2 class="jobSectionHeader"><b>
Job Area:</b></h2>
Engineering Group, Engineering Group &gt; CPU Engineering<p></p><p><b>
General Summary:</b></p><p>
Qualcomm custom CPU team is looking for highly talented, innovative, teamwork-oriented individuals for our cutting-edge technology work in CPU_PD team!</p><p></p><p>
Our Mission</p><p>
We are dedicated to transforming the industry by reimagining silicon and developing next-generation custom cpus. By joining our team, you&rsquo;ll collaborate with world-class engineers to create innovative solutions that push the limits of performance, energy efficiency, and scalability. Our focus is on developing world-class high performance CPU solutions that are highly optimized for the needs of the server/compute/mobile platforms.</p><p></p><p>
As a CPU PD Engineer, you will work with microarchitecture, RTL design and physical design teams to design, floorplan and integrate the CPU designs meeting aggressive power, area and performance goals using industry standard tools/flows.</p><p></p><p>
Minimum Requirements</p><ul><li><p>
Proficiency in synthesis, place and route, and signoff timing/power analysis.</p></li><li><p>
Expertise in block-level implementation as well as full chip floorplanning and power grid planning.</p></li><li><p>
Skilled in physical design, integration, and verification of large processor and system-on-chip (SoC) designs.</p></li><li><p>
Extensive knowledge of low power and high-performance design methodologies.</p></li><li><p>
Strong understanding of circuit and layout design principles.</p></li><li><p>
Proven ability to work effectively within a team environment.</p></li><li><p>
In-depth understanding of Physical Verification methodologies.</p></li></ul><p>
Preferred qualifications</p><ul><li><p>
MS degree in Electrical Engineering; 10+ years of practical experience</p></li><li><p>
Experience in deep submicron process technology nodes is strongly preferred.</p></li><li><p>
Experience as a key technical lead driving development and delivery of physical design databases is a plus</p></li><li><p>
Solid understanding industry standard tools for synthesis, place &amp; route and tape out flows.</p></li></ul><p>
Roles and Responsibilities</p><ul><li><p>
Perform CPU physical design tasks, including floorplanning, Bump/RDL planning, IP integration, power/ground generation, and pin assignment.</p></li><li><p>
Oversee full chip floorplan, area optimizations, block partitioning, and pin assignments.</p></li><li><p>
Manage chip-level place and route, and finalize the CPU database for construction and verification.</p></li><li><p>
Coordinate custom layout integration.</p></li><li><p>
Collaborate with external teams to fulfill IP technical and delivery requirements.</p></li><li><p>
Develop workflows for chip integration and analysis.</p></li><li><p>
Ensure the designs are validated for functional and electrical robustness.</p></li></ul><p></p><p><b>
Minimum Qualifications:</b></p><ul><li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.</li></ul>
OR<br>
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.<br>
OR<br>
PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.<p></p><div><p>
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).</p></div><p></p><p><b>
To all Staffing and Recruiting Agencies</b>: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.</p><p><b>
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.</b></p><p></p><p>
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.</p><p></p><p><b><br>
Pay range </b><b>and Other Compensation &amp; Benefits</b><b>:
</b></p>$148,300.00 - $222,500.00<p></p><p>
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer &ndash; and you can review more details about our US benefits at this link.</p><p></p><p>
If you would like more information about this role, please contact Qualcomm Careers.</p></div>

CPU Floorplan and Integration Engineer

Analog Devices

<div><div>Come join Analog Devices (ADI) &ndash; a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare.</div><div></div><div>
ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future.</div><div></div><div>
About Analog Devices</div><div>
Analog Devices, Inc. (NASDAQ: <div>ADI</div> ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible&trade;. Learn more at <div>www.analog.com</div> and on <div>LinkedIn</div> and <div>Twitter (X)</div>.</div><div></div><div><br>
The Position:</div><div></div><div>
At Analog Devices Automotive AVDS Istanbul Design Center, you will be able to work together with a global team, who has designed and introduced many successful products that won sockets from top car makers in Europe, Asia and the USA. We, as Automotive AVDS group, are developing integrated circuits for are automotive and high-speed serial data communications for next generation safety and infotainment systems and autonomous vehicles.</div><div></div><div>
As a Layout / Physical Design Engineer, you will be part and member of analog/mixed-signal design team, and have opportunity to work with analog design, digital design, engineering teams to work on leading edge complex mixed-signal integrated circuits developed in GMSL SerDes group utilizing Bulk CMOS and FinFet process technologies.</div><div></div><div>
This is a unique opportunity for someone who is willing to have an understanding of complex integrated circuit layouts and work in collaboration with various teams within GMSL group. You will play a key role in high-speed analog/mixed-signal IC layout.</div><div></div><div>
Main responsibilities are:</div><ul><li>
Interpret design requirements and floorplans for analog circuit layout.</li><li>
Execute block- and chip-level layout development and tapeout under supervision.</li><li>
Learn and apply design rules to optimize layout for matching, area, and performance.</li><li>
Perform physical verification (LVS, DRC, ERC) and parasitic extraction using tools like Calibre and Quantus.</li><li>
Collaborate with design engineers to deliver quality layouts using Cadence Virtuoso XL.</li><li>
Document tasks and support layout analysis using JIRA, spreadsheets, and basic scripting.</li><li>
Manage planning and learning activities guided by senior engineers.</li></ul><div></div><div>
Minimum Qualifications:</div><ul><li>
Bachelor&rsquo;s degree in Electrical/Electronics Engineering.</li><li>
Solid knowledge of analog and mixed-signal layout techniques, including matching and parasitic reduction.</li><li>
Hands-on experience with Cadence Virtuoso and Calibre verification tools.</li><li>
Strong communication and teamwork skills in English.</li><li>
Self-motivated, detail-oriented, and able to work independently.</li><li>
Ability to collaborate effectively with global teams.</li><li>
Eagerness to learn and adapt to new tools and methodologies.</li></ul><div></div><div>
Preferred Qualifications &amp; Experience:</div><ul><li>
Currently enrolled in a Master&rsquo;s program in Electrical/Electronics Engineering..</li><li>
1+ years of transistor-level circuit layout and verification experience.</li><li>
Expertise in advanced analog/mixed-signal layouts, including PLLs, transmitters/receivers, LDOs, amplifiers, op-amps, comparators, bandgaps, and bias circuits.</li><li>
Strong understanding of semiconductor physics and practical layout requirements (material stack-up, device matching, latch-up prevention, ESD protection, routing/shielding, current density).</li><li>
Proficiency with Cadence Virtuoso XL, Calibre, and related verification tools.</li><li>
Experience with scripting (e.g., Shell, Perl, Skill) for layout automation.</li><li>
Experience with Virtuoso Custom Router, Skillcad</li><li>
Familiarity with semiconductor process technologies (bulk CMOS, FinFET).</li><li>
Knowledge of data management tools such as VersIC or Methodics.</li><li>
Strong Linux proficiency.</li><li>
Experience mentoring or guiding junior layout engineers.</li><li>
Excellent analytical, problem-solving, documentation, and presentation skills.</li><li>
Ability to manage multiple priorities and deliver innovative solutions under tight schedules.</li></ul><div></div><div><i>
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position &ndash; except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) &ndash; may have to go through an export licensing review process.</i></div><div></div><div><i>
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.</i></div><div></div>
Job Req Type: Graduate Job<br>
<div></div>
Required Travel: Yes, 10% of the time</div><div></div>

Associate Designer, Layout

<div><div>Are you a problem solver looking for a hands-on internship position with a market-leading company that will help develop your career and reward you intellectually and professionally?</div><div></div><div>
About Analog Devices</div><div>
Analog Devices, Inc. (NASDAQ: <div>ADI</div> ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible&trade;. Learn more at <div>www.analog.com</div> and on <div>LinkedIn</div> and <div>Twitter (X)</div>.</div><div></div><div>
At ADI, you will learn from the brightest minds who are here to help you grow and succeed. During your internship, you will make an impact through work on meaningful projects alongside a team of experts. Collaborating with colleagues in an environment of respect and responsibility, you will create connections that will become a part of your professional network.</div><div></div><div>
ADI&rsquo;s culture values aligned goals, work-life balance, continuous and life-long learning opportunities, and shared rewards. The internship program features various lunch-and-learn topics and social events with other interns and full-time employees.</div><div></div><div>
At ADI, our goal is to develop our interns so they are the first to be considered for full-time roles.</div><div></div><div>
Apply now for the opportunity to grow your career and help innovate ahead of what&rsquo;s possible.</div><div></div><div><br>
The Position:</div><div></div><div>
At Analog Devices Automotive AVDS Istanbul Design Center, you will be able to work together with a global team, who has designed and introduced many successful products that won sockets from top car makers in Europe, Asia and the USA. We, as Automotive AVDS group, are developing integrated circuits for are automotive and high-speed serial data communications for next generation safety and infotainment systems and autonomous vehicles.</div><div></div><div>
As a Layout / Physical Design Engineer, you will be part and member of analog/mixed-signal design team, and have opportunity to work with analog design, digital design, engineering teams to work on leading edge complex mixed-signal integrated circuits developed in GMSL SerDes group utilizing Bulk CMOS and FinFet process technologies.</div><div></div><div>
This is a unique opportunity for someone who is willing to have an understanding of complex integrated circuit layouts and work in collaboration with various teams within GMSL group. You will play a key role in high-speed analog/mixed-signal IC layout.</div><div></div><div>
Main responsibilities are:</div><ul><li>
Assist in interpreting design requirements and floorplans for analog circuit layout.</li><li>
Support block- and chip-level layout development and tapeout under supervision.</li><li>
Learn and apply design rules to optimize layout for matching, area, and performance.</li><li>
Perform basic physical verification (LVS, DRC, ERC) and parasitic extraction using tools like Calibre and Quantus.</li><li>
Collaborate with design engineers to deliver quality layouts using Cadence Virtuoso XL.</li><li>
Document tasks and support layout analysis using JIRA, spreadsheets, and basic scripting.</li><li>
Participate in planning and learning activities guided by senior engineers.</li></ul><div></div><div>
Minimum Qualifications:</div><ul><li>
Currently in the final year of a Bachelor&rsquo;s degree in Electrical/Electronics Engineering with an expected graduation date before Jan 2027.</li><li>
Basic knowledge of analog and mixed-signal circuit layout techniques (matching, parasitic reduction).</li><li>
Familiarity with Cadence Virtuoso and Calibre verification tools (through coursework, projects, or internships).</li><li>
Interest in IC layout design and willingness to learn advanced tools and methodologies.</li><li>
Strong communication and teamwork skills in English.</li><li>
Self-motivated, detail-oriented, and eager to improve through hands-on experience.</li><li>
Eagerness to learn every day and adapt to new tools and methodologies.</li><li>
Ability to collaborate effectively with global teams.</li></ul><div></div><div>
Preferred Qualifications &amp; Experience:</div><ul><li>
Exposure to analog/mixed-signal IC layout through coursework, projects, or internships.</li><li>
Familiarity with Cadence Virtuoso XL, Calibre, or other EDA/verification tools.</li><li>
Understanding of semiconductor device physics and practical layout concepts (device matching, latch-up prevention, ESD, shielding, current density).</li><li>
Coursework or project experience with circuits such as PLLs, amplifiers, comparators, bandgaps, bias circuits, or similar.</li><li>
Basic scripting knowledge (e.g., Skill or Linux) for automation.</li><li>
Exposure to semiconductor process technologies (e.g., bulk CMOS, FinFET) through classes, labs, or research.</li><li>
Familiarity with data management or version control tools (VersIC, Methodics, or similar) is a plus.</li><li>
Strong analytical, problem-solving, and documentation skills.</li><li>
Willingness to take on layout challenges and learn from experienced engineers.</li></ul><div></div><div><i>
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position &ndash; except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) &ndash; may have to go through an export licensing review process.</i></div><div></div><div><i>
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.</i></div><div></div>
Job Req Type: Internship/Cooperative<br>
<div></div>
Required Travel: Yes, 10% of the time</div><div></div>

Layout Intern

Lana Al Arab Contracting

<p><b>Senior Engineer-ELV System</b></p><p>Experience: 8-10 years of experience</p><p>Duration: 6 months, extendable</p><p>Location: Doha</p><p>- Hands-on Experienced in VM/ Server and storage level configuration and troubleshooting</p><p>- Experienced in CCTV VMS system design and implementation</p><p>- &#8288;Basic knowledge in IT networks</p><p>- &#8288;Basic troubleshooting knowledge for Port communications</p><p>- &#8288;Good communication skills</p><p>- &#8288;Experienced in MOI SSD DSA and DIA regulations</p><p>- &#8288;Other ELV system experience like, Milestone, Avigilon VMS, ACS, Physical security systems.</p><p><b>Require *Immediate joiners from Qatar with Valid QID*</b></p><p>Job Types: Full-time, Contract<br/>Contract length: 1 month</p><p>Application Question(s):</p><ul><li>Do you have customer place experience? if yes how many years?</li><li>Can you join immediately?</li></ul><p>Experience:</p><ul><li>Senior Engineer-ELV System: 10 years (Required)</li></ul><p>Location:</p><ul><li>Doha (Required)</li></ul>

Senior Engineer-ELV System

Thrive Foods

<div><p><b>Job Title: </b>Automation Engineer</p><p><b>
Department: </b>Engineering</p><p><b>
Reports to</b>: Automation Engineering Manager</p><p><b>
Location:</b> Modesto, CA</p><p>
Salary range listed is based on experience</p><p>
The Automation Engineer designs, implements, and maintains industrial automation, control, and instrumentation systems. This role requires expertise in electrical design, control programming, instrumentation, and system troubleshooting. The ideal candidate is detail-oriented, analytical, and thrives in a fast-paced manufacturing environment.</p><p>
 <b>Essential Functions Include:</b></p><ul><li>
Design and develop industrial automation systems, including PLC, HMI, and SCADA applications.</li><li>
Program, test, and commission PLC/HMI control systems for new and existing equipment</li><li>
Design, construct, modify, and maintain control panel layouts and electrical schematics.</li><li>
Develop and update P&amp;IDs and instrumentation diagrams using CAD software.</li><li>
Develop Functional Design Specifications and Control Narratives</li><li>
Specify, integrate, and calibrate industrial sensors and measurement devices.</li><li>
Troubleshoot automation hardware and instrumentation issues</li><li>
Ensure compliance with industry standards, safety regulations, and company policies.</li><li>
Lead and manage automation initiatives during entire project lifecycle from concept through commissioning</li><li>
Collaborate with engineering, maintenance, and production teams to improve automation and control processes.</li><li>
Stay current with emerging automation technologies and best practices.</li><li>
Perform other duties as assigned</li></ul><p>
 <b>Qualifications Include:</b></p><ul><li>
Bachelor&rsquo;s degree in electrical engineering, automation engineering, or related field.</li><li>
Hands-on experience with PLC programming and HMI/SCADA development (Ignition preferred)</li><li>
Experience in commissioning activities, including I/O checks and sequence testing.</li><li>
Familiarity with motor controls, PID loops, VFDs, sensors, and industrial instrumentation.</li><li>
Ability to read, redline, and update electrical schematics, P&amp;IDs, and technical documentation.</li><li>
Strong analytical, troubleshooting, and problem-solving skills.</li><li>
Excellent communication and teamwork abilities</li><li>
Ability to travel up to 25% to company and supplier sites across North America.</li></ul><p><b>
Preferred Qualifications:</b></p><ul><li>
5+ years of relative experience</li><li>
Proficiency with electrical design tools (AutoCAD Electrical or EPLAN preferred).</li><li>
Experience designing and constructing control panels utilizing applicable design standards.</li><li>
Strong Knowledge of industrial communication protocols such as Modbus, Ethernet/IP, etc.</li><li>
Understanding database integration including SQL, MES, or data historians.</li><li>
Experience with controls for utilities systems, such as steam, refrigeration, etc.</li></ul><p><b>
Food Safety Requirements:</b></p><ul><li>
Place high priority on food safety, quality, and sanitation by understanding and executing Thrive Freeze Dry&rsquo;s food safety and sanitation policies and procedures.</li><li>
Hold self and others accountable to Thrive Freeze Dry&rsquo;s food safety &amp; sanitation guidelines and policies by communicating any food safety incident, observation, or opportunity to your leadership team or teammates.</li></ul><p><b>
 </b><b>Physical Requirements</b> &ndash; Must be able to perform the following functions with or without accommodations:</p><ul><li>
Consistent and reliable attendance</li><li>
The usual and customary methods of performing the job's functions require the following physical demands: some lifting, carrying, pushing, and/or pulling; some stooping, kneeling, crouching, and/or crawling; and frequent fine finger dexterity. Generally, the job requires the following percentages of time committed to physical activity: 50% or more sitting, 50% or more walking, and 50% or more standing.</li><li>
The job is performed under some temperature variations and in a food manufacturing production environment. Unrestricted visual and audio abilities are required for the safety of all employees. The ability to lift to 40 lbs. is required.</li></ul></div><p></p>

Automation Engineer

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