soc design engineer

Imec

<div></div><div><div><div><div><div>Research &amp; development - Doha | About a week ago</div><div><div>
Join imec's Falcon Research Center in Qatar in a unique dual-impact role as Senior FPGA Engineer and System Prototyping Lead.
</div></div><div></div><div><div>
</div></div></div></div></div><div><div><div><div><div><div>About imec Qatar</div>
<p>Imec Qatar is a new regional office where we drive our mission of pioneering innovative semiconductor solutions that lay the foundation for a smarter, greener, and truly AI-driven future. Specializing in advanced design tools for emerging technologies like silicon photonics and 3D integrated circuits, imec Qatar is at the forefront of chip development. And we're driving the future with intelligent solutions to optimize infrastructure, and deep-tech innovations targeting applications for a sustainable society.<br>
This is more than just a new office - it's the start of an exciting journey. With the launch of imec Qatar, you have the unique opportunity to join us from day one and help shape the future of semiconductor innovation in the region. Be part of the team from the very beginning, joining us as Senior FPGA Engineer &amp; System Prototyping Lead.!</p>
<p>What you will do</p>
<p>Join imec's Falcon Research Center in Qatar in a unique dual-impact role as Senior FPGA Engineer and System Prototyping Lead. You will be instrumental in establishing and leading the centre&rsquo;s FPGA prototyping and system validation laboratory while driving the implementation and verification of cutting-edge RISC-V based compute architectures.<br>
<br>
This is a rare opportunity to build a state-of-the-art prototyping facility from the ground up while working hands-on with next-generation HPC and Mobile SoC designs. You'll define lab infrastructure, establish workflows, and create the foundation for rapid architecture exploration and system validation that will serve the centre for years to come.</p><ul><li><b>
FPGA Engineering &amp; Prototyping</b><br>
<ul><li>
Lead FPGA-based prototyping of RISC-V compute architectures and SoC designs</li><li>
Implement and optimize complex RTL designs on high-end FPGA platforms (Xilinx Virtex/UltraScale+, Intel Stratix/Agilex)</li><li>
Develop system-level prototypes integrating processors, accelerators, memory controllers, and interconnects</li><li>
Create hardware-software co-validation environments for architecture exploration</li><li>
Design and implement debugging infrastructure, performance monitors, and measurement frameworks</li></ul></li><li><b>
Laboratory Setup &amp; Infrastructure Development</b><br>
<ul><li>
Design and establish the centre&rsquo;s FPGA prototyping and system validation laboratory from scratch</li><li>
Define equipment requirements and specifications for FPGA development platforms, test equipment, and measurement tools</li><li>
Procure and commission FPGA development boards, logic analyzers, oscilloscopes, power analyzers, and supporting infrastructure</li><li>
Establish laboratory safety protocols, equipment maintenance procedures, and inventory management systems</li><li>
Design and implement lab network infrastructure supporting high-bandwidth data transfer and remote access</li></ul></li><li><b>
Technical Leadership &amp; Collaboration</b><br>
<ul><li>
Serve as the technical expert and go-to resource for FPGA design and system prototyping</li><li>
Collaborate with computer architects to translate architecture specifications into FPGA implementations</li><li>
Interface with software teams to enable early software development on FPGA prototypes</li></ul></li><li><b>
Methodology &amp; Tool Development</b><br>
<ul><li>
Establish FPGA design flows, build systems, and continuous integration frameworks</li><li>
Develop automation scripts and tools to accelerate design iteration and validation</li><li>
Create measurement and analysis frameworks for performance characterization</li></ul></li></ul>
<p>You will be part of imec, and that means&hellip;</p>
<p>
You will join a world-class research center in nanotechnology at our brand-new office in Doha (Qatar). You will build a team that shapes technology that will determine the society of tomorrow. Imec is an inclusive employer with an open, multicultural, and informal working environment. We provide ample room for initiative and professional development.</p>
<p>Who you are</p>
<ul><li><b>Required skills</b><br>
<ul><li>
MSc in Electrical Engineering, Computer Engineering, Embedded Systems, or related field (PhD preferred)</li><li>
7+ years of hands-on FPGA design and implementation experience</li><li>
Expert-level proficiency in:<br>
<ul><li>
RTL design using Verilog/SystemVerilog or VHDL</li><li>
FPGA synthesis, implementation, and timing closure</li><li>
Xilinx Vivado and/or Intel Quartus toolchains</li><li>
High-speed interface design (PCIe, DDR, Ethernet, SERDES)</li><li>
Debugging tools (ILA, ChipScope, SignalTap)</li></ul></li><li>
Proven experience with large-scale, multi-FPGA system designs</li><li>
Strong understanding of computer architecture and SoC design principles</li><li>
Experience setting up or managing hardware laboratories and test infrastructure</li><li>
Solid scripting skills (Python, Tcl, shell) for automation and build flows</li><li>
Excellent problem-solving abilities and hands-on troubleshooting skills</li><li>
Strong project management and organizational capabilities</li><li>
Excellent communication skills in English</li></ul></li></ul><p></p><p><i><br>
IMEC and its affiliates will not accept unsolicited resumes from any source other than directly from a candidate. IMEC will consider unsolicited referrals and/or resumes submitted by vendors such as search firms, staffing agencies, professional recruiters, fee-based referral services and recruiting agencies (hereafter &ldquo;Agency&rdquo;) to have been referred by the Agency free of charge. IMEC will not pay a fee to any Agency that does not have a prior written agreement with IMEC, validated by its HR department, in place regarding a specific job opening and allowing to submit resumes.</i></p></div></div></div></div></div></div><p></p>

Senior FPGA Engineer & System Prototyping Lead

Google

<div><h3 class="jobSectionHeader"><b>Minimum qualifications:</b></h3><ul>
<li>Bachelor's, Master's, or Dual degree in Electrical, Electronics and Communication Engineering, or relevant technical field.</li>
<li>Experience with design concepts and computer hardware architecture.</li></ul><br>
<h3 class="jobSectionHeader"><b>
Preferred qualifications:</b></h3><ul>
<li><div><div>Internship work, work experience, or personal project experience outside the classroom in Hardware, Electrical Engineering or Mechanical Engineering.</div></div></li>
<li>Internship work, work experience, or personal project experience outside the classroom in Hardware, Electrical Engineering, or Mechanical Engineering.</li>
<li>Experience in one or more of the following areas: SoC/ASIC Design, Design Verification, Physical Design, Design for Testability.</li>
<li>Experience with Verilog/HDL or System Verilog coding.</li>
</ul><div><h2 class="jobSectionHeader"><b>About the job</b></h2><p>
Google engineers develop the next-generation technologies that change how users connect, explore, and interact with information and one another. As a member of an extraordinarily creative, motivated and talented team, you develop new products that are used by millions of people. We need our engineers to be versatile and passionate to take on new problems as we continue to push technology forward. If you get excited about building new things and working across discipline lines, then our team might be your next career step.</p>
<p>
Google's Consumer Hardware Silicon division builds chips optimized for Google-branded consumer devices. Our product areas include imaging, machine learning, video, and security. We aim to build a team with talent that resonates with Google's culture of innovation and fun.</p><div>
As a Silicon Design Verification Engineer, you will design, develop, and deploy consumer hardware. As a member of a fast-paced multi-disciplinary team, you will use your creativity and diverse range of engineering experience to explore solutions to a variety of engineering problems. Additionally, you will participate in the design, analysis, and prototyping of new concepts. You will also work in a manufacturing and product oriented development environment and collaborate with vendors and outside sources in order to see parts through to manufacture.</div><p>
The ML, Systems, &amp; Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.
</p><p>We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud&rsquo;s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.</p></div><div><h2 class="jobSectionHeader"><b>
Responsibilities</b></h2><ul>
<li>Work with the SoC teams to develop power and performance optimized chips.</li>
<li>Contribute to the design, verification, and silicon implementation of ASICs and SoCs.</li>
<li>Work on design concepts around CPUs, image processing, machine learning, computer vision, security, and video.</li>
<li>Collaborate with teams in automating the SoC design flows.</li>
</ul></div>Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.</div>

Silicon Design Verification Engineer, University Graduate, 2026

<div><h3 class="jobSectionHeader"><b>Minimum qualifications:</b></h3><ul>
<li>Bachelor's, Master's, or Dual degree in Electrical, Electronics and Communication Engineering, or relevant technical field.</li>
<li>Experience with basic design concepts and computer hardware architecture.</li></ul><br>
<h3 class="jobSectionHeader"><b>
Preferred qualifications:</b></h3><ul>
<li><div><div>Internship work, work experience, or personal project experience outside the classroom in Hardware, Electrical Engineering or Mechanical Engineering.</div></div></li>
<li>Experience in one or more of the following areas: SoC/ASIC design, design verification, physical design, design for testability.</li>
<li>Experience with Verilog/HDL or System Verilog coding.</li>
</ul><div><h2 class="jobSectionHeader"><b>About the job</b></h2><p>
Google engineers develop the next-generation technologies that change how users connect, explore, and interact with information and one another. As a member of an extraordinarily creative, motivated and talented team, you develop new products that are used by millions of people. We need our engineers to be versatile and passionate to take on new problems as we continue to push technology forward. If you get excited about building new things and working across discipline lines, then our team might be your next career step.</p>
<p>
Google's Consumer Hardware Silicon division builds chips optimized for Google branded consumer devices. Our product areas include imaging, machine learning, video, and security. We aim to build a team with talent that resonates with Google's culture of innovation and fun.</p><div>
As a Silicon Engineer, you will design, develop, and deploy consumer hardware. As a member of a fast-paced multi-disciplinary team, you will use your creativity and various range of engineering experience to explore solutions to a variety of engineering problems. Additionally, you will participate in the design, analysis, and prototyping of new concepts. You will also work in a manufacturing and product oriented development environment and collaborate with vendors and outside sources in order to see parts through to manufacture.</div><p>
The ML, Systems, &amp; Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.
</p><p>We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud&rsquo;s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.</p></div><div><h2 class="jobSectionHeader"><b>
Responsibilities</b></h2><ul>
<li>Work with the SoC teams to develop power and performance optimized chips.</li>
<li>Contribute to the design, verification, and silicon implementation of ASICs and SoCs.</li>
<li>Work on design concepts around CPUs, image processing, machine learning, computer vision, security, and video.</li>
<li>Collaborate with teams in automating the SoC design flows.</li>
</ul></div>Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.</div>

Silicon CAD Automation Engineer, University Graduate, 2026

TAT IT Technolgies

<div>
 <strong>
  Urgent requirement for Splunk Admin is required for our client in Bahrain
  <br/>
  <br/>
 </strong>
 <strong>
  Core Responsibilities
  <br/>
  <br/>
 </strong>
 <ul>
  <li>
   End‑to‑end Splunk administration &amp; onboarding/integration of new log sources or requirements, parsing/normalization to Splunk.
  </li>
  <li>
   Splunk admin: cluster, indexer cluster, license, Splunk health/upgrade/DR, performance tuning &amp; data model acceleration.
   <br/>
   <br/>
  </li>
 </ul>
 PaloAlto XSOAR: playbook design, connectors/integrations, custom integrations.
 <br/>
 <br/>
 <strong>
  Qualifications
  <br/>
  <br/>
 </strong>
 <ul>
  <li>
   5&ndash;8 years SOC experience; 3+ years Splunk administration; 2+ years XSOAR.
  </li>
  <li>
   Scripting (Python/PowerShell), Linux, networking, cloud logs (AWS/Azure), IR/ITIL.
  </li>
  <li>
   Certifications (preferred): Splunk Core Admin/ES, Palo Alto Cortex XSOAR Engineer.
  </li>
  <li>
   Nice to have: Cribl/syslog‑ng/Kafka, STIX/TAXII, bilingual (Arabic/English).
   <br/>
   <br/>
  </li>
 </ul>
 Splunk admin: cluster, indexer cluster, license, Splunk health/upgrade/DR, performance tuning &amp; data model acceleration.
 <br/>
 <br/>
 PaloAlto XSOAR: playbook design, connectors/integrations, custom integrations.
 <br/>
 <br/>
 Skills: admin,splunk,xsoar,soc
</div>


Splunk Admin

VaporVM

<div><div><div><b>Date Posted:</b></div>
30 December, 2025</div>
<div><div><b>Industry:</b></div>
IT Services and IT Consulting</div>
<div><div><b>Location:</b></div>
VAPORVM IT SERVICES DMCC</div></div>
<br><div><h2 class="jobSectionHeader"><b>Job Description:</b></h2><br>
<p></p><div><div><div><div><div><p><b>Security and Zero Trust Engineer</b></p><br>
<p></p>
<p>
We are seeking a highly skilled <b>Senior Network Security Engineer</b> to design, implement, and enforce advanced enterprise security architectures. The ideal candidate will have strong hands-on experience with <b>Fortinet security solutions</b>, <b>Zero Trust architecture</b>, <b>network segmentation</b>, and <b>Azure security services</b>, along with exposure to <b>SASE and ZTNA frameworks</b>.</p>
<p>
This role involves end-to-end execution of security-related projects, security control hardening, validation, and operational support, working closely with infrastructure, cloud, and SOC teams.</p>
<h3 class="jobSectionHeader"><b>
Key Responsibilities</b></h3>
<ul><li>Execute <b>security-related project implementations</b>, including network segmentation, Zero Trust architecture, secure access, and SASE initiatives.</li>
<li>Design, configure, and tune <b>network and cloud security controls</b> aligned with enterprise security standards.</li>
<li>Implement and enforce <b>Zero Trust, ZTNA, NAC, and segmentation policies</b> across on-prem and cloud environments.</li>
<li>Support <b>security testing, validation, UAT, and go-live activities</b> for security projects.</li>
<li>Participate in <b>incident response and troubleshooting</b> related to project changes and security control modifications.</li>
<li>Integrate security solutions with <b>SIEM/SOC platforms</b> for monitoring, alerting, and incident handling.</li>
<li>Collaborate with infrastructure, cloud, and application teams to ensure secure-by-design implementations.</li>
<li>Prepare and maintain security documentation, reports, and compliance artifacts.</li>
</ul><h3 class="jobSectionHeader"><b>Must-Have Deliverables &amp; Documentation</b></h3>
<ul><li>Security <b>configuration and hardening reports</b></li>
<li><b>Zero Trust and network segmentation implementation records</b></li>
<li>Security <b>testing, validation, and assessment results</b></li>
<li><b>Project security sign-off and approval documentation</b></li>
</ul><h3 class="jobSectionHeader"><b>Technical Skills &amp; Expertise</b></h3>
<p><b>
Network &amp; Security Technologies</b></p>
<ul>
<li>FortiGate Firewalls</li>
<li>FortiManager &amp; FortiAnalyzer</li>
<li>VPN (IPsec &amp; SSL)</li>
<li>IPS, IDS, Web Filtering</li>
<li>SASE &amp; ZTNA</li>
<li>FortiMail, FortiNDR</li>
<li>CASB solutions</li>
<li>NAC: <b>FortiNAC or ClearPass</b></li></ul></div></div></div></div></div></div><p></p>

Security & Zero Trust

Tecvity

<p>Exfiltra is hiring a <b>Security Engineer</b> focused on <b>security engineering, application security, cloud security, and penetration testing</b>. This role is designed for practitioners who enjoy working deep in systems, code, and architecture&mdash;and who take pride in building and breaking real-world environments.</p><p>This is <b>not</b> a SOC or blue team role.</p><p><b>Experience Required:</b> <b>6 months &ndash; 1 year</b></p><p>What You&rsquo;ll Be Working On</p><ul><li>Application security assessments (Web, API, Mobile)</li><li>Cloud security reviews and hardening (AWS, Azure, GCP)</li><li>Infrastructure and application penetration testing</li><li>Secure architecture design and implementation</li><li>Threat modeling and security design reviews</li><li>Collaborating closely with engineering teams to embed security into the SDLC</li><li>Converting findings into clear, practical, engineering-focused remediation guidance</li></ul><p>Required Skills &amp; Experience</p><ul><li>Strong hands-on experience in <b>application security and penetration testing</b></li><li>Practical exposure to <b>cloud security</b> (AWS, Azure, or GCP)</li><li>Ability to understand, review, and write code (e.g., Python, JavaScript, Go, Java, etc.)</li><li>Solid understanding of:</li><li>Web &amp; API security vulnerabilities</li><li>Authentication and authorization mechanisms</li><li>Secure architecture patterns</li><li>OWASP Top 10 and modern attack techniques</li><li>Comfortable going beyond tools and automation&mdash;this is a <b>security engineering role</b>, not a checklist-based assessment role</li></ul><p>Important: This position involves regular interaction with code and architecture. Candidates who are not comfortable with coding, debugging, or technical deep-dives may find this role unsuitable. Certifications (Relevant &amp; Valued)</p><p>One or more of the following is strongly preferred:</p><ul><li>CPTS (Certified Penetration Testing Specialist)</li><li>PNPT (Practical Network Penetration Tester)</li><li>CRT (Certified Red Team)</li><li>OSCP / OSWE or equivalent hands-on certifications</li></ul><p><b>CREST certifications will be given strong preference</b></p><p>Additional Preference</p><ul><li>Open-source contributors (security tools, libraries, research, or write-ups)</li><li>Candidates with a <b>strong Capture The Flag (CTF) background</b>, including platform-based or competitive CTF participation</li></ul><p>Hiring Process</p><p>This role involves a <b>multi-stage vetting process</b>, designed to assess real-world skills and problem-solving ability.<br/>Candidates should expect:</p><ul><li>Technical interviews</li><li>Practical security discussions</li><li>A <b>CTF-style challenge</b> as part of the evaluation</li></ul><p>We take hiring seriously and evaluate depth, not buzzwords.</p><p>Who Should NOT Apply</p><ul><li>Candidates with <b>SOC-focused or blue team-only backgrounds</b></li><li>Professionals primarily seeking alert monitoring, SIEM operations, or IR-only roles</li></ul><p>This role is <b>engineering-driven</b>, not operational monitoring.</p><p>How to Apply</p><p>Send your CV to: <b>hr@exfiltra.com</b><br/><b>Subject:</b> <i>Security Engineer</i></p><p>If you enjoy <b>engineering secure systems, breaking insecure ones, and proving your skills through hands-on challenges</b>, this role offers strong growth, autonomy, and meaningful impact at Exfiltra.</p><p>Job Type: Full-time</p><p>Application Question(s):</p><ul><li>What is your current salary?</li><li>What are your salary expectations?</li><li>What is your current notice period?</li></ul><p>Work Location: In person</p>

Security Engineer

<div></div><div><div><div><div><div>Research &amp; development - Doha | About a week ago</div><div><div>
Join imec's Falcon Research Center in Qatar in a visionary technical leadership role where you'll architect next-generation compute platforms for HPC and Mobile applications while simultaneously building the AI-driven tools, frameworks, and methodologies that enable unprecedented design productivity and innovation.
</div></div><div></div><div><div>
</div></div></div></div></div><div><div><div><div><div><div>About imec Qatar</div>
<p>Imec Qatar is a new regional office where we drive our mission of pioneering innovative semiconductor solutions that lay the foundation for a smarter, greener, and truly AI-driven future. Specializing in advanced design tools for emerging technologies like silicon photonics and 3D integrated circuits, imec Qatar is at the forefront of chip development. And we're driving the future with intelligent solutions to optimize infrastructure, and deep-tech innovations targeting applications for a sustainable society.<br>
This is more than just a new office - it's the start of an exciting journey. With the launch of imec Qatar, you have the unique opportunity to join us from day one and help shape the future of semiconductor innovation in the region. Be part of the team from the very beginning, joining us as Principal SoC/SiP Architect (AI-Assisted Design &amp; Architecture Enablement)</p>
<p>What you will do</p>
<p>Join imec's Falcon Research Center in Qatar as Principal SoC/SiP Architect, pioneering the convergence of artificial intelligence and semiconductor design. You will lead the transformation of how RISC-V based System-on-Chip and System-in-Package platforms are conceived, designed, and optimized by developing and deploying AI-assisted methodologies that revolutionize architecture exploration, design space optimization, and system validation.<br>
<br>
In this visionary technical leadership role, you'll architect next-generation compute platforms for HPC and Mobile applications while simultaneously building the AI-driven tools, frameworks, and methodologies that enable unprecedented design productivity and innovation. Your work will establish a new paradigm where machine learning accelerates every phase of the SoC/SiP lifecycle&mdash;from early architecture exploration through physical implementation and validation.</p><ul><li><b>
AI-Assisted Architecture &amp; Design Innovation</b><br>
<ul><li>
Pioneer AI-driven methodologies for SoC/SiP architecture design space exploration and optimization</li><li>
Develop machine learning models for:</li><li>
Automated architecture generation and configuration optimization</li><li>
Performance prediction across workloads and design points</li><li>
Power/performance/area (PPA) optimization using reinforcement learning</li><li>
Floorplanning and chiplet placement optimization for SiP designs</li><li>
Workload characterization and hardware-software co-optimization</li><li>
Create surrogate models enabling rapid evaluation of thousands of architecture variants</li><li>
Build AI-assisted frameworks for design validation, verification planning, and bug prediction</li></ul></li><li><b>
SoC/SiP Architecture Leadership</b><br>
<ul><li>
Define reference architectures for RISC-V based SoC and SiP platforms targeting HPC and mobile domains</li><li>
Architect complete systems including:</li><li>
Multi-core CPU subsystems with AI-optimized configurations</li><li>
Memory hierarchies optimised through ML-driven exploration</li><li>
NoC designs generated and optimized using graph neural networks</li><li>
Heterogeneous compute platforms (CPU+GPU+accelerators) with AI-assisted integration</li></ul></li><li><b>
Design Enablement &amp; Methodology Development</b><br>
<ul><li>
Build comprehensive AI-assisted design enablement infrastructure and toolchains</li><li>
Develop automated flows for RTL generation, synthesis optimization, and timing closure using ML</li><li>
Create intelligent debugging and root cause analysis tools leveraging anomaly detection</li><li>
Establish data pipelines capturing design metrics, simulation results, and performance data</li></ul></li><li><b>
Technical Leadership &amp; Team Development</b><br>
<ul><li>
Lead cross-functional initiatives integrating AI/ML researchers, SoC architects, and chip designers</li><li>
Mentor architects and engineers on AI-assisted design methodologies and tools</li><li>
Establish best practices for trustworthy AI in critical design decisions</li><li>
Define metrics and validation frameworks ensuring AI recommendations are reliable and explainable</li></ul></li><li><b>
Research &amp; Industry Leadership</b><br>
<ul><li>
Publish groundbreaking research at premier venues (ISSCC, DAC, ICCAD, ISCA, NeurIPS)</li><li>
Present at industry conferences on AI-assisted design methodologies (Hot Chips, Design Automation Conference)</li><li>
Contribute to open-source ML frameworks for hardware design (e.g., CircuitNet, MLPerf)</li></ul></li><li><b>
Strategic Program Development</b><br>
<ul><li>
Define roadmap for AI-assisted design capabilities at Falcon Research Center</li><li>
Identify opportunities where AI can provide 10x improvements in design productivity or quality</li><li>
Evaluate and integrate emerging AI technologies (foundation models, multi-agent systems, neural synthesis)</li></ul></li></ul>
<p>You will be part of imec, and that means&hellip;</p>
<p>
You will join a world-class research center in nanotechnology at our brand-new office in Doha (Qatar). You will build a team that shapes technology that will determine the society of tomorrow. Imec is an inclusive employer with an open, multicultural, and informal working environment. We provide ample room for initiative and professional development.</p>
<p>
Who you are</p>
<p><b>Required skills</b></p><ul><li>
PhD in Computer Engineering, Electrical Engineering, Computer Science, or related field with 12+ years of experience, or MSc with 15+ years</li><li>
Proven track record of successful SoC tape-outs with deep architecture experience</li><li>
Strong expertise in both traditional SoC/SiP architecture AND modern AI/ML techniques</li><li>
Deep knowledge of RISC-V ISA, SoC architecture fundamentals:</li><li>
Multi-core systems, cache coherence, memory hierarchies</li><li>
Interconnect fabrics, NoC architectures</li><li>
Heterogeneous compute integration</li><li>
Advanced packaging and chiplet technologies</li><li>
Demonstrated experience applying AI/ML to hardware design problems:</li><li>
Architecture design space exploration</li><li>
Performance modeling and prediction</li><li>
Optimization algorithms (RL, Bayesian optimization, genetic algorithms)</li><li>
Graph neural networks for hardware representation</li><li>
Surrogate modeling for rapid evaluation</li><li>
Strong programming skills in Python and ML frameworks (PyTorch, TensorFlow, JAX)</li><li>
Experience with architecture modeling, simulation, and performance analysis tools</li><li>
Excellent leadership and communication skills with ability to bridge hardware and AI communities</li><li>
Vision for transforming semiconductor design through AI enablement</li></ul><p><i>
IMEC and its affiliates will not accept unsolicited resumes from any source other than directly from a candidate. IMEC will consider unsolicited referrals and/or resumes submitted by vendors such as search firms, staffing agencies, professional recruiters, fee-based referral services and recruiting agencies (hereafter &ldquo;Agency&rdquo;) to have been referred by the Agency free of charge. IMEC will not pay a fee to any Agency that does not have a prior written agreement with IMEC, validated by its HR department, in place regarding a specific job opening and allowing to submit resumes.</i></p></div></div></div></div></div></div><p></p>

Principal SoC/SiP Architect (AI-Assisted Design & Architecture Enablement)

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