Sr. Lead Engineer - Digital Design

• Architecture & Microarchitecture Design:
  Assist in defining and implementing hardware architectures optimized for AI inference performance and efficiency.
• RTL Design & Integration:
  Develop and integrate Register Transfer Level (RTL) components for SoCs using industry-standard HDLs (Verilog/SystemVerilog).
• Functional Verification:
  Create testbenches, write assertions, and perform simulation-based verification to ensure design correctness.
• Physical Design Support:
  Collaborate with physical design teams on synthesis, timing closure, and power optimization.
• System Engineering & Performance Analysis:
  Work with system engineers to model workloads, analyze performance bottlenecks, and validate AI inference use cases.
• Performance & Power modelling
  

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