Principal ASIC Design Engineer

About onsemi
onsemi (Nasdaq: ON) is a global leader in intelligent power and sensing technologies, driving innovation to build a safer, cleaner, and smarter world. With a strong focus on automotive, industrial, and AI data center markets, we are shaping the future of vehicle electrification, sustainable energy, and advanced automation.

About the Treo Platform
The newly launched Treo Platform is a cutting-edge analog and mixed-signal solution built on 65nm Bipolar-CMOS-DMOS (BCD) technology. Supporting voltage ranges from 1–90V and operating temperatures up to 175°C, Treo is engineered for high-performance applications in automotive, medical, industrial, and AI data centers. Its modular architecture simplifies design, reduces system costs, and accelerates time-to-market. All products are manufactured at our state-of-the-art 300mm fab in East Fishkill, NY.

Your Role
You would be working on a Sub-System of the Treo platform. We are seeking a seasoned Digital Design Expert to lead a Sub-System for the platform. This is a unique opportunity to shape the Sub-System of a transformative technology platform within a dynamic, global organization.

Preferred Qualifications
Experience with AI-driven digital design tools
Exposure to platform standardization and IP reuse strategies

Why Join Us
We create a diverse set of world-class products in a friendly and team-oriented atmosphere. We provide an environment of continual learning and growth opportunities and support volunteer and charitable programs. We offer competitive benefit package and a great place to work. You will be able to build up a career in a successful international company, and you can participate in interesting international projects.

Key Responsibilities
Micro architect, implement and verify the digital Sub-System
Interact with multiple cross functional teams on requirements and deliverables.
Lead design and verification planning and ensure design testability
Perform hands-on RTL coding and scripting for any automation.
Ensure the IP meets the ASIL requirements.
Drive innovation and standardization.

What you need
BE/ME in electronics or related technical field.
At least 7 years of relevant experience in semiconductor product development.
Proven expertise in SoC architecture, IP selection, RTL design and verification
Strong grasp of digital design principles: FSMs, timing analysis, combinational/sequential logic
Proficiency in Verilog/System Verilog
Familiarity with tools: Lint, CDC, RDC, Design Compiler
Experience with standard interfaces: APB, AHB, AXI, SPI, I2C, DMA
Design techniques: pipelining, low latency, power optimization
Experience writing high-quality technical documentation
Proficiency in scripting languages: Python, PERL
Experience leading small projects
Ability to write specifications from high-level requirements
Understanding of DFT, Functional Safety (FuSa)
Should have good analytical skills for debug work needed during verification.